Ameya Palande 91a290c457 ARM: OMAP4: clock data: fix mult and div mask for USB_DPLL
According to OMAP4 TRM Table 3-1183, CM_CLKSEL_DPLL_USB register defines
following fields for multiplication and division factors:

DPLL_MULT (bits 19:8) DPLL multiplier factor (2 to 4095)
DPLL_DIV (bits 7:0) DPLL divider factor (0 to 255)

Acked-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Ameya Palande <ameya.palande@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
2012-04-04 14:52:49 -06:00
..
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-06 21:34:45 -06:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-30 17:31:56 -07:00
2012-03-13 21:25:21 -05:00
2012-03-29 18:02:10 -07:00
2012-03-30 17:31:56 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-30 17:31:56 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-30 17:31:56 -07:00
2012-03-29 21:30:28 -07:00
2012-03-30 17:31:56 -07:00
2012-03-29 18:02:10 -07:00
2012-03-29 18:02:10 -07:00
2012-03-28 18:30:01 +01:00
2012-03-29 18:02:10 -07:00
2011-12-23 22:58:10 +00:00
2012-03-28 18:30:01 +01:00
2012-03-29 18:02:10 -07:00