bede480d45
Nearly all mpc83xx-based boards have a common piece of code - one that loops over all pci/pcie bridges and registers them. Merge that code into a special function common to all boards. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
91 lines
3.1 KiB
C
91 lines
3.1 KiB
C
#ifndef __MPC83XX_H__
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#define __MPC83XX_H__
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#include <linux/init.h>
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#include <linux/device.h>
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#include <asm/pci-bridge.h>
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/* System Clock Control Register */
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#define MPC83XX_SCCR_OFFS 0xA08
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#define MPC83XX_SCCR_USB_MASK 0x00f00000
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#define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
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#define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
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#define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
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#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
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#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
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#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
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#define MPC8315_SCCR_USB_MASK 0x00c00000
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#define MPC8315_SCCR_USB_DRCM_11 0x00c00000
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#define MPC8315_SCCR_USB_DRCM_01 0x00400000
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#define MPC837X_SCCR_USB_DRCM_11 0x00c00000
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/* system i/o configuration register low */
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#define MPC83XX_SICRL_OFFS 0x114
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#define MPC834X_SICRL_USB_MASK 0x60000000
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#define MPC834X_SICRL_USB0 0x20000000
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#define MPC834X_SICRL_USB1 0x40000000
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#define MPC831X_SICRL_USB_MASK 0x00000c00
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#define MPC831X_SICRL_USB_ULPI 0x00000800
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#define MPC8315_SICRL_USB_MASK 0x000000fc
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#define MPC8315_SICRL_USB_ULPI 0x00000054
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#define MPC837X_SICRL_USB_MASK 0xf0000000
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#define MPC837X_SICRL_USB_ULPI 0x50000000
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#define MPC837X_SICRL_USBB_MASK 0x30000000
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#define MPC837X_SICRL_SD 0x20000000
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/* system i/o configuration register high */
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#define MPC83XX_SICRH_OFFS 0x118
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#define MPC8308_SICRH_USB_MASK 0x000c0000
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#define MPC8308_SICRH_USB_ULPI 0x00040000
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#define MPC834X_SICRH_USB_UTMI 0x00020000
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#define MPC831X_SICRH_USB_MASK 0x000000e0
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#define MPC831X_SICRH_USB_ULPI 0x000000a0
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#define MPC8315_SICRH_USB_MASK 0x0000ff00
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#define MPC8315_SICRH_USB_ULPI 0x00000000
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#define MPC837X_SICRH_SPI_MASK 0x00000003
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#define MPC837X_SICRH_SD 0x00000001
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/* USB Control Register */
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#define FSL_USB2_CONTROL_OFFS 0x500
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#define CONTROL_UTMI_PHY_EN 0x00000200
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#define CONTROL_REFSEL_24MHZ 0x00000040
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#define CONTROL_REFSEL_48MHZ 0x00000080
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#define CONTROL_PHY_CLK_SEL_ULPI 0x00000400
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#define CONTROL_OTG_PORT 0x00000020
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/* USB PORTSC Registers */
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#define FSL_USB2_PORTSC1_OFFS 0x184
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#define FSL_USB2_PORTSC2_OFFS 0x188
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#define PORTSCX_PTW_16BIT 0x10000000
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#define PORTSCX_PTS_UTMI 0x00000000
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#define PORTSCX_PTS_ULPI 0x80000000
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/*
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* Declaration for the various functions exported by the
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* mpc83xx_* files. Mostly for use by mpc83xx_setup
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*/
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extern void mpc83xx_restart(char *cmd);
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extern long mpc83xx_time_init(void);
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extern int mpc837x_usb_cfg(void);
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extern int mpc834x_usb_cfg(void);
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extern int mpc831x_usb_cfg(void);
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extern void mpc83xx_ipic_init_IRQ(void);
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#ifdef CONFIG_QUICC_ENGINE
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extern void mpc83xx_qe_init_IRQ(void);
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extern void mpc83xx_ipic_and_qe_init_IRQ(void);
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#else
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static inline void __init mpc83xx_qe_init_IRQ(void) {}
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#define mpc83xx_ipic_and_qe_init_IRQ mpc83xx_ipic_init_IRQ
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#endif /* CONFIG_QUICC_ENGINE */
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#ifdef CONFIG_PCI
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extern void mpc83xx_setup_pci(void);
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#else
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#define mpc83xx_setup_pci() do {} while (0)
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#endif
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extern int mpc83xx_declare_of_platform_devices(void);
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#endif /* __MPC83XX_H__ */
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