Thierry Reding 939e7430de arm64: tegra: Fix base address for SOR1 on Tegra194
The SOR1 hardware block's registers start at physical address 0x15b40000
as correctly specified by the unit-address, but the reg property lists a
wrong value, likely because it was copy-and-pasted from SOR0 but not
correctly updated.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-29 20:30:05 +01:00
..
2019-09-18 09:49:13 -07:00
2019-09-03 15:44:40 +02:00
2019-08-21 18:47:15 +01:00
2019-09-20 08:36:47 -07:00