Rename the atomic helper function drm_atomic_helper_check_crtc_state() to drm_atomic_helper_check_crtc_primary_plane() and only check for an attached primary plane. Adapt callers. Instead of having one big function to check for various CRTC state conditions, we rather want smaller functions that drivers can pick individually. v5: * rebase on top of udl changes Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20221007124338.24152-3-tzimmermann@suse.de
616 lines
17 KiB
C
616 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2012 Red Hat
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*
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* based in parts on udlfb.c:
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* Copyright (C) 2009 Roberto De Ioris <roberto@unbit.it>
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* Copyright (C) 2009 Jaya Kumar <jayakumar.lkml@gmail.com>
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* Copyright (C) 2009 Bernie Thompson <bernie@plugable.com>
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*/
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#include <linux/bitfield.h>
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#include <drm/drm_atomic.h>
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#include <drm/drm_atomic_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_damage_helper.h>
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#include <drm/drm_drv.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_fourcc.h>
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#include <drm/drm_gem_atomic_helper.h>
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#include <drm/drm_gem_framebuffer_helper.h>
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#include <drm/drm_gem_shmem_helper.h>
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#include <drm/drm_modeset_helper_vtables.h>
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#include <drm/drm_plane_helper.h>
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#include <drm/drm_probe_helper.h>
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#include <drm/drm_vblank.h>
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#include "udl_drv.h"
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#include "udl_proto.h"
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/*
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* All DisplayLink bulk operations start with 0xaf (UDL_MSG_BULK), followed by
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* a specific command code. All operations are written to a command buffer, which
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* the driver sends to the device.
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*/
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static char *udl_set_register(char *buf, u8 reg, u8 val)
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{
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*buf++ = UDL_MSG_BULK;
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*buf++ = UDL_CMD_WRITEREG;
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*buf++ = reg;
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*buf++ = val;
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return buf;
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}
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static char *udl_vidreg_lock(char *buf)
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{
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return udl_set_register(buf, UDL_REG_VIDREG, UDL_VIDREG_LOCK);
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}
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static char *udl_vidreg_unlock(char *buf)
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{
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return udl_set_register(buf, UDL_REG_VIDREG, UDL_VIDREG_UNLOCK);
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}
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static char *udl_set_blank_mode(char *buf, u8 mode)
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{
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return udl_set_register(buf, UDL_REG_BLANKMODE, mode);
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}
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static char *udl_set_color_depth(char *buf, u8 selection)
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{
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return udl_set_register(buf, UDL_REG_COLORDEPTH, selection);
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}
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static char *udl_set_base16bpp(char *buf, u32 base)
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{
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/* the base pointer is 24 bits wide, 0x20 is hi byte. */
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u8 reg20 = FIELD_GET(UDL_BASE_ADDR2_MASK, base);
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u8 reg21 = FIELD_GET(UDL_BASE_ADDR1_MASK, base);
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u8 reg22 = FIELD_GET(UDL_BASE_ADDR0_MASK, base);
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buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR2, reg20);
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buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR1, reg21);
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buf = udl_set_register(buf, UDL_REG_BASE16BPP_ADDR0, reg22);
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return buf;
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}
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/*
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* DisplayLink HW has separate 16bpp and 8bpp framebuffers.
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* In 24bpp modes, the low 323 RGB bits go in the 8bpp framebuffer
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*/
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static char *udl_set_base8bpp(char *buf, u32 base)
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{
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/* the base pointer is 24 bits wide, 0x26 is hi byte. */
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u8 reg26 = FIELD_GET(UDL_BASE_ADDR2_MASK, base);
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u8 reg27 = FIELD_GET(UDL_BASE_ADDR1_MASK, base);
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u8 reg28 = FIELD_GET(UDL_BASE_ADDR0_MASK, base);
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buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR2, reg26);
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buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR1, reg27);
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buf = udl_set_register(buf, UDL_REG_BASE8BPP_ADDR0, reg28);
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return buf;
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}
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static char *udl_set_register_16(char *wrptr, u8 reg, u16 value)
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{
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wrptr = udl_set_register(wrptr, reg, value >> 8);
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return udl_set_register(wrptr, reg+1, value);
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}
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/*
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* This is kind of weird because the controller takes some
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* register values in a different byte order than other registers.
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*/
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static char *udl_set_register_16be(char *wrptr, u8 reg, u16 value)
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{
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wrptr = udl_set_register(wrptr, reg, value);
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return udl_set_register(wrptr, reg+1, value >> 8);
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}
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/*
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* LFSR is linear feedback shift register. The reason we have this is
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* because the display controller needs to minimize the clock depth of
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* various counters used in the display path. So this code reverses the
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* provided value into the lfsr16 value by counting backwards to get
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* the value that needs to be set in the hardware comparator to get the
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* same actual count. This makes sense once you read above a couple of
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* times and think about it from a hardware perspective.
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*/
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static u16 udl_lfsr16(u16 actual_count)
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{
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u32 lv = 0xFFFF; /* This is the lfsr value that the hw starts with */
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while (actual_count--) {
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lv = ((lv << 1) |
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(((lv >> 15) ^ (lv >> 4) ^ (lv >> 2) ^ (lv >> 1)) & 1))
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& 0xFFFF;
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}
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return (u16) lv;
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}
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/*
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* This does LFSR conversion on the value that is to be written.
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* See LFSR explanation above for more detail.
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*/
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static char *udl_set_register_lfsr16(char *wrptr, u8 reg, u16 value)
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{
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return udl_set_register_16(wrptr, reg, udl_lfsr16(value));
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}
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/*
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* Takes a DRM display mode and converts it into the DisplayLink
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* equivalent register commands.
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*/
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static char *udl_set_display_mode(char *buf, struct drm_display_mode *mode)
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{
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u16 reg01 = mode->crtc_htotal - mode->crtc_hsync_start;
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u16 reg03 = reg01 + mode->crtc_hdisplay;
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u16 reg05 = mode->crtc_vtotal - mode->crtc_vsync_start;
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u16 reg07 = reg05 + mode->crtc_vdisplay;
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u16 reg09 = mode->crtc_htotal - 1;
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u16 reg0b = 1; /* libdlo hardcodes hsync start to 1 */
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u16 reg0d = mode->crtc_hsync_end - mode->crtc_hsync_start + 1;
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u16 reg0f = mode->hdisplay;
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u16 reg11 = mode->crtc_vtotal;
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u16 reg13 = 0; /* libdlo hardcodes vsync start to 0 */
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u16 reg15 = mode->crtc_vsync_end - mode->crtc_vsync_start;
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u16 reg17 = mode->crtc_vdisplay;
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u16 reg1b = mode->clock / 5;
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buf = udl_set_register_lfsr16(buf, UDL_REG_XDISPLAYSTART, reg01);
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buf = udl_set_register_lfsr16(buf, UDL_REG_XDISPLAYEND, reg03);
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buf = udl_set_register_lfsr16(buf, UDL_REG_YDISPLAYSTART, reg05);
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buf = udl_set_register_lfsr16(buf, UDL_REG_YDISPLAYEND, reg07);
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buf = udl_set_register_lfsr16(buf, UDL_REG_XENDCOUNT, reg09);
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buf = udl_set_register_lfsr16(buf, UDL_REG_HSYNCSTART, reg0b);
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buf = udl_set_register_lfsr16(buf, UDL_REG_HSYNCEND, reg0d);
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buf = udl_set_register_16(buf, UDL_REG_HPIXELS, reg0f);
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buf = udl_set_register_lfsr16(buf, UDL_REG_YENDCOUNT, reg11);
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buf = udl_set_register_lfsr16(buf, UDL_REG_VSYNCSTART, reg13);
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buf = udl_set_register_lfsr16(buf, UDL_REG_VSYNCEND, reg15);
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buf = udl_set_register_16(buf, UDL_REG_VPIXELS, reg17);
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buf = udl_set_register_16be(buf, UDL_REG_PIXELCLOCK5KHZ, reg1b);
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return buf;
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}
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static char *udl_dummy_render(char *wrptr)
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{
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*wrptr++ = UDL_MSG_BULK;
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*wrptr++ = UDL_CMD_WRITECOPY16;
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*wrptr++ = 0x00; /* from addr */
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*wrptr++ = 0x00;
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*wrptr++ = 0x00;
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*wrptr++ = 0x01; /* one pixel */
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*wrptr++ = 0x00; /* to address */
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*wrptr++ = 0x00;
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*wrptr++ = 0x00;
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return wrptr;
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}
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static long udl_log_cpp(unsigned int cpp)
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{
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if (WARN_ON(!is_power_of_2(cpp)))
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return -EINVAL;
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return __ffs(cpp);
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}
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static int udl_handle_damage(struct drm_framebuffer *fb,
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const struct iosys_map *map,
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const struct drm_rect *clip)
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{
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struct drm_device *dev = fb->dev;
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void *vaddr = map->vaddr; /* TODO: Use mapping abstraction properly */
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int i, ret;
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char *cmd;
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struct urb *urb;
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int log_bpp;
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ret = udl_log_cpp(fb->format->cpp[0]);
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if (ret < 0)
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return ret;
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log_bpp = ret;
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urb = udl_get_urb(dev);
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if (!urb)
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return -ENOMEM;
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cmd = urb->transfer_buffer;
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for (i = clip->y1; i < clip->y2; i++) {
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const int line_offset = fb->pitches[0] * i;
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const int byte_offset = line_offset + (clip->x1 << log_bpp);
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const int dev_byte_offset = (fb->width * i + clip->x1) << log_bpp;
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const int byte_width = drm_rect_width(clip) << log_bpp;
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ret = udl_render_hline(dev, log_bpp, &urb, (char *)vaddr,
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&cmd, byte_offset, dev_byte_offset,
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byte_width);
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if (ret)
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return ret;
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}
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if (cmd > (char *)urb->transfer_buffer) {
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/* Send partial buffer remaining before exiting */
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int len;
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if (cmd < (char *)urb->transfer_buffer + urb->transfer_buffer_length)
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*cmd++ = UDL_MSG_BULK;
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len = cmd - (char *)urb->transfer_buffer;
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ret = udl_submit_urb(dev, urb, len);
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} else {
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udl_urb_completion(urb);
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}
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return 0;
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}
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/*
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* Primary plane
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*/
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static const uint32_t udl_primary_plane_formats[] = {
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DRM_FORMAT_RGB565,
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DRM_FORMAT_XRGB8888,
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};
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static const uint64_t udl_primary_plane_fmtmods[] = {
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DRM_FORMAT_MOD_LINEAR,
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DRM_FORMAT_MOD_INVALID
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};
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static void udl_primary_plane_helper_atomic_update(struct drm_plane *plane,
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struct drm_atomic_state *state)
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{
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struct drm_device *dev = plane->dev;
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struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
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struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
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struct drm_framebuffer *fb = plane_state->fb;
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struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
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struct drm_atomic_helper_damage_iter iter;
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struct drm_rect damage;
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int ret, idx;
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if (!fb)
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return; /* no framebuffer; plane is disabled */
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ret = drm_gem_fb_begin_cpu_access(fb, DMA_FROM_DEVICE);
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if (ret)
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return;
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if (!drm_dev_enter(dev, &idx))
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goto out_drm_gem_fb_end_cpu_access;
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drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
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drm_atomic_for_each_plane_damage(&iter, &damage) {
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udl_handle_damage(fb, &shadow_plane_state->data[0], &damage);
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}
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drm_dev_exit(idx);
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out_drm_gem_fb_end_cpu_access:
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drm_gem_fb_end_cpu_access(fb, DMA_FROM_DEVICE);
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}
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static const struct drm_plane_helper_funcs udl_primary_plane_helper_funcs = {
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DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
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.atomic_check = drm_plane_helper_atomic_check,
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.atomic_update = udl_primary_plane_helper_atomic_update,
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};
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static const struct drm_plane_funcs udl_primary_plane_funcs = {
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.update_plane = drm_atomic_helper_update_plane,
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.disable_plane = drm_atomic_helper_disable_plane,
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.destroy = drm_plane_cleanup,
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DRM_GEM_SHADOW_PLANE_FUNCS,
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};
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/*
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* CRTC
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*/
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static int udl_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state)
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{
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struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
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if (!new_crtc_state->enable)
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return 0;
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return drm_atomic_helper_check_crtc_primary_plane(new_crtc_state);
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}
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static void udl_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state)
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{
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struct drm_device *dev = crtc->dev;
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struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
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struct drm_display_mode *mode = &crtc_state->mode;
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struct urb *urb;
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char *buf;
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int idx;
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if (!drm_dev_enter(dev, &idx))
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return;
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urb = udl_get_urb(dev);
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if (!urb)
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goto out;
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buf = (char *)urb->transfer_buffer;
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buf = udl_vidreg_lock(buf);
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buf = udl_set_color_depth(buf, UDL_COLORDEPTH_16BPP);
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/* set base for 16bpp segment to 0 */
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buf = udl_set_base16bpp(buf, 0);
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/* set base for 8bpp segment to end of fb */
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buf = udl_set_base8bpp(buf, 2 * mode->vdisplay * mode->hdisplay);
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buf = udl_set_display_mode(buf, mode);
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buf = udl_set_blank_mode(buf, UDL_BLANKMODE_ON);
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buf = udl_vidreg_unlock(buf);
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buf = udl_dummy_render(buf);
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udl_submit_urb(dev, urb, buf - (char *)urb->transfer_buffer);
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out:
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drm_dev_exit(idx);
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}
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static void udl_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state)
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{
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struct drm_device *dev = crtc->dev;
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struct urb *urb;
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char *buf;
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int idx;
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if (!drm_dev_enter(dev, &idx))
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return;
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urb = udl_get_urb(dev);
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if (!urb)
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goto out;
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buf = (char *)urb->transfer_buffer;
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buf = udl_vidreg_lock(buf);
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buf = udl_set_blank_mode(buf, UDL_BLANKMODE_POWERDOWN);
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buf = udl_vidreg_unlock(buf);
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buf = udl_dummy_render(buf);
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udl_submit_urb(dev, urb, buf - (char *)urb->transfer_buffer);
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out:
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drm_dev_exit(idx);
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}
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static const struct drm_crtc_helper_funcs udl_crtc_helper_funcs = {
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.atomic_check = udl_crtc_helper_atomic_check,
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.atomic_enable = udl_crtc_helper_atomic_enable,
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.atomic_disable = udl_crtc_helper_atomic_disable,
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};
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static const struct drm_crtc_funcs udl_crtc_funcs = {
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.reset = drm_atomic_helper_crtc_reset,
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.destroy = drm_crtc_cleanup,
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.set_config = drm_atomic_helper_set_config,
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.page_flip = drm_atomic_helper_page_flip,
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.atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state,
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.atomic_destroy_state = drm_atomic_helper_crtc_destroy_state,
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};
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/*
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* Encoder
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*/
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static const struct drm_encoder_funcs udl_encoder_funcs = {
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.destroy = drm_encoder_cleanup,
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};
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/*
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* Connector
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*/
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static int udl_connector_helper_get_modes(struct drm_connector *connector)
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{
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struct udl_connector *udl_connector = to_udl_connector(connector);
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drm_connector_update_edid_property(connector, udl_connector->edid);
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if (udl_connector->edid)
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return drm_add_edid_modes(connector, udl_connector->edid);
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return 0;
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}
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static const struct drm_connector_helper_funcs udl_connector_helper_funcs = {
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.get_modes = udl_connector_helper_get_modes,
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};
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static int udl_get_edid_block(void *data, u8 *buf, unsigned int block, size_t len)
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{
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struct udl_device *udl = data;
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struct drm_device *dev = &udl->drm;
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struct usb_device *udev = udl_to_usb_device(udl);
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u8 *read_buff;
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int ret;
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size_t i;
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read_buff = kmalloc(2, GFP_KERNEL);
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if (!read_buff)
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return -ENOMEM;
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for (i = 0; i < len; i++) {
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int bval = (i + block * EDID_LENGTH) << 8;
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ret = usb_control_msg(udev, usb_rcvctrlpipe(udev, 0),
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0x02, (0x80 | (0x02 << 5)), bval,
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0xA1, read_buff, 2, USB_CTRL_GET_TIMEOUT);
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if (ret < 0) {
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drm_err(dev, "Read EDID byte %zu failed err %x\n", i, ret);
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goto err_kfree;
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} else if (ret < 1) {
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ret = -EIO;
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drm_err(dev, "Read EDID byte %zu failed\n", i);
|
|
goto err_kfree;
|
|
}
|
|
|
|
buf[i] = read_buff[1];
|
|
}
|
|
|
|
kfree(read_buff);
|
|
|
|
return 0;
|
|
|
|
err_kfree:
|
|
kfree(read_buff);
|
|
return ret;
|
|
}
|
|
|
|
static enum drm_connector_status udl_connector_detect(struct drm_connector *connector, bool force)
|
|
{
|
|
struct drm_device *dev = connector->dev;
|
|
struct udl_device *udl = to_udl(dev);
|
|
struct udl_connector *udl_connector = to_udl_connector(connector);
|
|
enum drm_connector_status status = connector_status_disconnected;
|
|
int idx;
|
|
|
|
/* cleanup previous EDID */
|
|
kfree(udl_connector->edid);
|
|
udl_connector->edid = NULL;
|
|
|
|
if (!drm_dev_enter(dev, &idx))
|
|
return connector_status_disconnected;
|
|
|
|
udl_connector->edid = drm_do_get_edid(connector, udl_get_edid_block, udl);
|
|
if (udl_connector->edid)
|
|
status = connector_status_connected;
|
|
|
|
drm_dev_exit(idx);
|
|
|
|
return status;
|
|
}
|
|
|
|
static void udl_connector_destroy(struct drm_connector *connector)
|
|
{
|
|
struct udl_connector *udl_connector = to_udl_connector(connector);
|
|
|
|
drm_connector_cleanup(connector);
|
|
kfree(udl_connector->edid);
|
|
kfree(udl_connector);
|
|
}
|
|
|
|
static const struct drm_connector_funcs udl_connector_funcs = {
|
|
.reset = drm_atomic_helper_connector_reset,
|
|
.detect = udl_connector_detect,
|
|
.fill_modes = drm_helper_probe_single_connector_modes,
|
|
.destroy = udl_connector_destroy,
|
|
.atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
|
|
.atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
|
|
};
|
|
|
|
struct drm_connector *udl_connector_init(struct drm_device *dev)
|
|
{
|
|
struct udl_connector *udl_connector;
|
|
struct drm_connector *connector;
|
|
int ret;
|
|
|
|
udl_connector = kzalloc(sizeof(*udl_connector), GFP_KERNEL);
|
|
if (!udl_connector)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
connector = &udl_connector->connector;
|
|
ret = drm_connector_init(dev, connector, &udl_connector_funcs, DRM_MODE_CONNECTOR_VGA);
|
|
if (ret)
|
|
goto err_kfree;
|
|
|
|
drm_connector_helper_add(connector, &udl_connector_helper_funcs);
|
|
|
|
connector->polled = DRM_CONNECTOR_POLL_HPD |
|
|
DRM_CONNECTOR_POLL_CONNECT |
|
|
DRM_CONNECTOR_POLL_DISCONNECT;
|
|
|
|
return connector;
|
|
|
|
err_kfree:
|
|
kfree(udl_connector);
|
|
return ERR_PTR(ret);
|
|
}
|
|
|
|
/*
|
|
* Modesetting
|
|
*/
|
|
|
|
static enum drm_mode_status udl_mode_config_mode_valid(struct drm_device *dev,
|
|
const struct drm_display_mode *mode)
|
|
{
|
|
struct udl_device *udl = to_udl(dev);
|
|
|
|
if (udl->sku_pixel_limit) {
|
|
if (mode->vdisplay * mode->hdisplay > udl->sku_pixel_limit)
|
|
return MODE_MEM;
|
|
}
|
|
|
|
return MODE_OK;
|
|
}
|
|
|
|
static const struct drm_mode_config_funcs udl_mode_config_funcs = {
|
|
.fb_create = drm_gem_fb_create_with_dirty,
|
|
.mode_valid = udl_mode_config_mode_valid,
|
|
.atomic_check = drm_atomic_helper_check,
|
|
.atomic_commit = drm_atomic_helper_commit,
|
|
};
|
|
|
|
int udl_modeset_init(struct drm_device *dev)
|
|
{
|
|
struct udl_device *udl = to_udl(dev);
|
|
struct drm_plane *primary_plane;
|
|
struct drm_crtc *crtc;
|
|
struct drm_encoder *encoder;
|
|
struct drm_connector *connector;
|
|
int ret;
|
|
|
|
ret = drmm_mode_config_init(dev);
|
|
if (ret)
|
|
return ret;
|
|
|
|
dev->mode_config.min_width = 640;
|
|
dev->mode_config.min_height = 480;
|
|
dev->mode_config.max_width = 2048;
|
|
dev->mode_config.max_height = 2048;
|
|
dev->mode_config.preferred_depth = 16;
|
|
dev->mode_config.funcs = &udl_mode_config_funcs;
|
|
|
|
primary_plane = &udl->primary_plane;
|
|
ret = drm_universal_plane_init(dev, primary_plane, 0,
|
|
&udl_primary_plane_funcs,
|
|
udl_primary_plane_formats,
|
|
ARRAY_SIZE(udl_primary_plane_formats),
|
|
udl_primary_plane_fmtmods,
|
|
DRM_PLANE_TYPE_PRIMARY, NULL);
|
|
if (ret)
|
|
return ret;
|
|
drm_plane_helper_add(primary_plane, &udl_primary_plane_helper_funcs);
|
|
drm_plane_enable_fb_damage_clips(primary_plane);
|
|
|
|
crtc = &udl->crtc;
|
|
ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL,
|
|
&udl_crtc_funcs, NULL);
|
|
if (ret)
|
|
return ret;
|
|
drm_crtc_helper_add(crtc, &udl_crtc_helper_funcs);
|
|
|
|
encoder = &udl->encoder;
|
|
ret = drm_encoder_init(dev, encoder, &udl_encoder_funcs, DRM_MODE_ENCODER_DAC, NULL);
|
|
if (ret)
|
|
return ret;
|
|
encoder->possible_crtcs = drm_crtc_mask(crtc);
|
|
|
|
connector = udl_connector_init(dev);
|
|
if (IS_ERR(connector))
|
|
return PTR_ERR(connector);
|
|
ret = drm_connector_attach_encoder(connector, encoder);
|
|
if (ret)
|
|
return ret;
|
|
|
|
drm_mode_config_reset(dev);
|
|
|
|
return 0;
|
|
}
|