968b493173
Intel TDX doesn't allow VMM to directly access guest private memory.
Any memory that is required for communication with the VMM must be
shared explicitly. The same rule applies for any DMA to and from the
TDX guest. All DMA pages have to be marked as shared pages. A generic way
to achieve this without any changes to device drivers is to use the
SWIOTLB framework.
The previous patch ("Add support for TDX shared memory") gave TDX guests
the _ability_ to make some pages shared, but did not make any pages
shared. This actually marks SWIOTLB buffers *as* shared.
Start returning true for cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT) in
TDX guests. This has several implications:
- Allows the existing mem_encrypt_init() to be used for TDX which
sets SWIOTLB buffers shared (aka. "decrypted").
- Ensures that all DMA is routed via the SWIOTLB mechanism (see
pci_swiotlb_detect())
Stop selecting DYNAMIC_PHYSICAL_MASK directly. It will get set
indirectly by selecting X86_MEM_ENCRYPT.
mem_encrypt_init() is currently under an AMD-specific #ifdef. Move it to
a generic area of the header.
Co-developed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: Kirill A. Shutemov <kirill.shutemov@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Andi Kleen <ak@linux.intel.com>
Reviewed-by: Tony Luck <tony.luck@intel.com>
Reviewed-by: Dave Hansen <dave.hansen@linux.intel.com>
Link: https://lkml.kernel.org/r/20220405232939.73860-28-kirill.shutemov@linux.intel.com
111 lines
3.2 KiB
C
111 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AMD Memory Encryption Support
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*
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* Copyright (C) 2016 Advanced Micro Devices, Inc.
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*
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* Author: Tom Lendacky <thomas.lendacky@amd.com>
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*/
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#ifndef __X86_MEM_ENCRYPT_H__
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#define __X86_MEM_ENCRYPT_H__
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#ifndef __ASSEMBLY__
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#include <linux/init.h>
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#include <linux/cc_platform.h>
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#include <asm/bootparam.h>
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#ifdef CONFIG_AMD_MEM_ENCRYPT
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extern u64 sme_me_mask;
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extern u64 sev_status;
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void sme_encrypt_execute(unsigned long encrypted_kernel_vaddr,
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unsigned long decrypted_kernel_vaddr,
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unsigned long kernel_len,
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unsigned long encryption_wa,
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unsigned long encryption_pgd);
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void __init sme_early_encrypt(resource_size_t paddr,
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unsigned long size);
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void __init sme_early_decrypt(resource_size_t paddr,
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unsigned long size);
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void __init sme_map_bootdata(char *real_mode_data);
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void __init sme_unmap_bootdata(char *real_mode_data);
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void __init sme_early_init(void);
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void __init sev_setup_arch(void);
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void __init sme_encrypt_kernel(struct boot_params *bp);
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void __init sme_enable(struct boot_params *bp);
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int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size);
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int __init early_set_memory_encrypted(unsigned long vaddr, unsigned long size);
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void __init early_set_mem_enc_dec_hypercall(unsigned long vaddr, int npages,
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bool enc);
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void __init mem_encrypt_free_decrypted_mem(void);
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void __init sev_es_init_vc_handling(void);
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#define __bss_decrypted __section(".bss..decrypted")
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#else /* !CONFIG_AMD_MEM_ENCRYPT */
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#define sme_me_mask 0ULL
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static inline void __init sme_early_encrypt(resource_size_t paddr,
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unsigned long size) { }
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static inline void __init sme_early_decrypt(resource_size_t paddr,
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unsigned long size) { }
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static inline void __init sme_map_bootdata(char *real_mode_data) { }
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static inline void __init sme_unmap_bootdata(char *real_mode_data) { }
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static inline void __init sme_early_init(void) { }
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static inline void __init sev_setup_arch(void) { }
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static inline void __init sme_encrypt_kernel(struct boot_params *bp) { }
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static inline void __init sme_enable(struct boot_params *bp) { }
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static inline void sev_es_init_vc_handling(void) { }
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static inline int __init
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early_set_memory_decrypted(unsigned long vaddr, unsigned long size) { return 0; }
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static inline int __init
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early_set_memory_encrypted(unsigned long vaddr, unsigned long size) { return 0; }
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static inline void __init
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early_set_mem_enc_dec_hypercall(unsigned long vaddr, int npages, bool enc) {}
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static inline void mem_encrypt_free_decrypted_mem(void) { }
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#define __bss_decrypted
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#endif /* CONFIG_AMD_MEM_ENCRYPT */
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/* Architecture __weak replacement functions */
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void __init mem_encrypt_init(void);
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/*
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* The __sme_pa() and __sme_pa_nodebug() macros are meant for use when
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* writing to or comparing values from the cr3 register. Having the
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* encryption mask set in cr3 enables the PGD entry to be encrypted and
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* avoid special case handling of PGD allocations.
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*/
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#define __sme_pa(x) (__pa(x) | sme_me_mask)
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#define __sme_pa_nodebug(x) (__pa_nodebug(x) | sme_me_mask)
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extern char __start_bss_decrypted[], __end_bss_decrypted[], __start_bss_decrypted_unused[];
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static inline u64 sme_get_me_mask(void)
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{
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return sme_me_mask;
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}
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#endif /* __ASSEMBLY__ */
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#endif /* __X86_MEM_ENCRYPT_H__ */
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