a7f4255f90
Commit f0fbf0abc0 ("x86: integrate delay functions") converted
delay_tsc() into a random delay generator for 64 bit. The reason is
that it merged the mostly identical versions of delay_32.c and
delay_64.c. Though the subtle difference of the result was:
static void delay_tsc(unsigned long loops)
{
- unsigned bclock, now;
+ unsigned long bclock, now;
Now the function uses rdtscl() which returns the lower 32bit of the
TSC. On 32bit that's not problematic as unsigned long is 32bit. On 64
bit this fails when the lower 32bit are close to wrap around when
bclock is read, because the following check
if ((now - bclock) >= loops)
break;
evaluated to true on 64bit for e.g. bclock = 0xffffffff and now = 0
because the unsigned long (now - bclock) of these values results in
0xffffffff00000001 which is definitely larger than the loops
value. That explains Tvortkos observation:
"Because I am seeing udelay(500) (_occasionally_) being short, and
that by delaying for some duration between 0us (yep) and 491us."
Make those variables explicitely u32 again, so this works for both 32
and 64 bit.
Reported-by: Tvrtko Ursulin <tvrtko.ursulin@onelan.co.uk>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org # >= 2.6.27
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
141 lines
2.8 KiB
C
141 lines
2.8 KiB
C
/*
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* Precise Delay Loops for i386
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*
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* Copyright (C) 1993 Linus Torvalds
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* Copyright (C) 1997 Martin Mares <mj@atrey.karlin.mff.cuni.cz>
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* Copyright (C) 2008 Jiri Hladky <hladky _dot_ jiri _at_ gmail _dot_ com>
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*
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* The __delay function must _NOT_ be inlined as its execution time
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* depends wildly on alignment on many x86 processors. The additional
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* jump magic is needed to get the timing stable on all the CPU's
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* we have to worry about.
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*/
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/timex.h>
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#include <linux/preempt.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <asm/processor.h>
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#include <asm/delay.h>
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#include <asm/timer.h>
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#ifdef CONFIG_SMP
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# include <asm/smp.h>
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#endif
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/* simple loop based delay: */
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static void delay_loop(unsigned long loops)
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{
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asm volatile(
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" test %0,%0 \n"
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" jz 3f \n"
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" jmp 1f \n"
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".align 16 \n"
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"1: jmp 2f \n"
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".align 16 \n"
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"2: dec %0 \n"
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" jnz 2b \n"
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"3: dec %0 \n"
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: /* we don't need output */
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:"a" (loops)
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);
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}
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/* TSC based delay: */
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static void delay_tsc(unsigned long __loops)
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{
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u32 bclock, now, loops = __loops;
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int cpu;
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preempt_disable();
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cpu = smp_processor_id();
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rdtsc_barrier();
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rdtscl(bclock);
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for (;;) {
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rdtsc_barrier();
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rdtscl(now);
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if ((now - bclock) >= loops)
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break;
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/* Allow RT tasks to run */
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preempt_enable();
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rep_nop();
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preempt_disable();
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/*
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* It is possible that we moved to another CPU, and
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* since TSC's are per-cpu we need to calculate
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* that. The delay must guarantee that we wait "at
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* least" the amount of time. Being moved to another
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* CPU could make the wait longer but we just need to
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* make sure we waited long enough. Rebalance the
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* counter for this CPU.
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*/
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if (unlikely(cpu != smp_processor_id())) {
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loops -= (now - bclock);
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cpu = smp_processor_id();
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rdtsc_barrier();
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rdtscl(bclock);
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}
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}
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preempt_enable();
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}
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/*
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* Since we calibrate only once at boot, this
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* function should be set once at boot and not changed
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*/
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static void (*delay_fn)(unsigned long) = delay_loop;
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void use_tsc_delay(void)
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{
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delay_fn = delay_tsc;
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}
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int __devinit read_current_timer(unsigned long *timer_val)
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{
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if (delay_fn == delay_tsc) {
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rdtscll(*timer_val);
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return 0;
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}
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return -1;
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}
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void __delay(unsigned long loops)
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{
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delay_fn(loops);
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}
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EXPORT_SYMBOL(__delay);
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inline void __const_udelay(unsigned long xloops)
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{
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int d0;
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xloops *= 4;
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asm("mull %%edx"
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:"=d" (xloops), "=&a" (d0)
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:"1" (xloops), "0"
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(this_cpu_read(cpu_info.loops_per_jiffy) * (HZ/4)));
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__delay(++xloops);
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}
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EXPORT_SYMBOL(__const_udelay);
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void __udelay(unsigned long usecs)
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{
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__const_udelay(usecs * 0x000010c7); /* 2**32 / 1000000 (rounded up) */
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}
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EXPORT_SYMBOL(__udelay);
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void __ndelay(unsigned long nsecs)
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{
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__const_udelay(nsecs * 0x00005); /* 2**32 / 1000000000 (rounded up) */
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}
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EXPORT_SYMBOL(__ndelay);
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