768fc661d1
Several fixes for RISC-V: - Fix function graph trace support - Prefix the CSR IRQ_* macro names with "RV_", to avoid collisions with macros elsewhere in the Linux kernel tree named "IRQ_TIMER" - Use __pa_symbol() when computing the physical address of a kernel symbol, rather than __pa() - Mark the RISC-V port as supporting GCOV One DT addition: - Describe the L2 cache controller in the FU540 DT file One documentation update: - Add patch acceptance guideline documentation -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl4Re3wACgkQx4+xDQu9 KkvPNA/6AmDvw90JX1Xm6jK2J/eYaUr29dJZ7KYdQ7HhbsixkJecTqjW3huyWfv6 ynsqWA0e87iSGyV+zBshw6nxVyGgDZgRam5100eiP25ZiTR5cbR8e6JmVVplGdkH VOONhAM64Pknoy+lCL0emP01+qa27PqTCQomxDDIxgrpfgbR9PPjgpuA7B0gCOz1 yhc6EjfbSRKLJjnowoSdvHcDvzU0oIPjMPxQz1gUmBmUKRp5Idn/xTtWG9p/M5T8 6XPzh8hEfbgvi0ur0Dlz9hav2g5mSL2S5n4CPitAAOyrG/jDktlQgYcs7nSTAk7m vtU6oUZTMJ9nmMyPQspI+krW2Q4g5BUUVRwm3ckNe6sqwrs8TlXIeTQb8Yb+B4Xm 3EaS5YvfMNoHjlHQZ814EPAFNEqROgI04O2Sl97+gqEpQUwC9qLSeXiVQHgxcW9/ 8UqlbY/9XvKnZq6btGAJElXAirbt5j+TWKCULyUKLu8mz3644ascIr2sBOkMSb61 ZRZbxEbK8Avwf2etv7hap1Gd2j+ywlK0IziKOsAPBr0Pif0lAdawf1PjH491spVc //re3g/rZu3I2+NK4qKNCoxZwzT5w/kK8rKJJ7sw8KVB2kTVjV7Qrmktt5Zeh021 PXPT/tUgLMvZW6RRCqPCXZru28qJxlLAhuQEtHC/KbSYcm2sSJc= =8HSd -----END PGP SIGNATURE----- Merge tag 'riscv/for-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Paul Walmsley: "Several fixes for RISC-V: - Fix function graph trace support - Prefix the CSR IRQ_* macro names with "RV_", to avoid collisions with macros elsewhere in the Linux kernel tree named "IRQ_TIMER" - Use __pa_symbol() when computing the physical address of a kernel symbol, rather than __pa() - Mark the RISC-V port as supporting GCOV One DT addition: - Describe the L2 cache controller in the FU540 DT file One documentation update: - Add patch acceptance guideline documentation" * tag 'riscv/for-v5.5-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: Documentation: riscv: add patch acceptance guidelines riscv: prefix IRQ_ macro names with an RV_ namespace clocksource: riscv: add notrace to riscv_sched_clock riscv: ftrace: correct the condition logic in function graph tracer riscv: dts: Add DT support for SiFive L2 cache controller riscv: gcov: enable gcov for RISC-V riscv: mm: use __pa_symbol for kernel symbols |
||
---|---|---|
.. | ||
alpha | ||
arc | ||
arm | ||
arm64 | ||
c6x | ||
csky | ||
h8300 | ||
hexagon | ||
ia64 | ||
m68k | ||
microblaze | ||
mips | ||
nds32 | ||
nios2 | ||
openrisc | ||
parisc | ||
powerpc | ||
riscv | ||
s390 | ||
sh | ||
sparc | ||
um | ||
unicore32 | ||
x86 | ||
xtensa | ||
.gitignore | ||
Kconfig |