David Daney 9787c56ee3 MIPS: OCTEON: Add OCTEON_IRQ_* definitions for cn68XX chips. ...

There are 64 workqueue, 32 watchdog, and 4 mbox.

Signed-off-by: David Daney <david.daney@cavium.com>

2012-08-31 10:46:54 -07:00

..

cpu-feature-overrides.h

MIPS: Octeon: Enable C0_UserLocal probing.

2011-09-24 01:44:41 +02:00

dma-coherence.h

MIPS: Octeon: Rewrite DMA mapping functions.

2010-10-29 19:08:32 +01:00

irq.h

MIPS: OCTEON: Add OCTEON_IRQ_* definitions for cn68XX chips.

2012-08-31 10:46:54 -07:00

kernel-entry-init.h

Octeon: Fix interrupt irq settings for performance counters.

2011-05-19 09:55:49 +01:00

war.h

MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.

2009-01-11 09:57:21 +00:00