9837559d8e
Many of the inc/dec ops are mandatory, but for most architectures inc/dec are simply trivial wrappers around their corresponding add/sub ops. Let's make all the inc/dec ops optional, so that we can get rid of these boilerplate wrappers. The instrumented atomics are updated accordingly. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Palmer Dabbelt <palmer@sifive.com> Cc: Boqun Feng <boqun.feng@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/lkml/20180621121321.4761-17-mark.rutland@arm.com Signed-off-by: Ingo Molnar <mingo@kernel.org>
170 lines
3.6 KiB
C
170 lines
3.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright IBM Corp. 1999, 2016
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* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
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* Denis Joseph Barrow,
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* Arnd Bergmann,
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*/
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#ifndef __ARCH_S390_ATOMIC__
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#define __ARCH_S390_ATOMIC__
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#include <linux/compiler.h>
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#include <linux/types.h>
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#include <asm/atomic_ops.h>
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#include <asm/barrier.h>
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#include <asm/cmpxchg.h>
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#define ATOMIC_INIT(i) { (i) }
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static inline int atomic_read(const atomic_t *v)
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{
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int c;
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asm volatile(
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" l %0,%1\n"
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: "=d" (c) : "Q" (v->counter));
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return c;
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}
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static inline void atomic_set(atomic_t *v, int i)
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{
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asm volatile(
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" st %1,%0\n"
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: "=Q" (v->counter) : "d" (i));
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}
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static inline int atomic_add_return(int i, atomic_t *v)
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{
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return __atomic_add_barrier(i, &v->counter) + i;
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}
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static inline int atomic_fetch_add(int i, atomic_t *v)
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{
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return __atomic_add_barrier(i, &v->counter);
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}
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static inline void atomic_add(int i, atomic_t *v)
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{
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#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
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if (__builtin_constant_p(i) && (i > -129) && (i < 128)) {
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__atomic_add_const(i, &v->counter);
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return;
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}
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#endif
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__atomic_add(i, &v->counter);
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}
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#define atomic_sub(_i, _v) atomic_add(-(int)(_i), _v)
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#define atomic_sub_return(_i, _v) atomic_add_return(-(int)(_i), _v)
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#define atomic_fetch_sub(_i, _v) atomic_fetch_add(-(int)(_i), _v)
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#define ATOMIC_OPS(op) \
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static inline void atomic_##op(int i, atomic_t *v) \
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{ \
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__atomic_##op(i, &v->counter); \
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} \
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static inline int atomic_fetch_##op(int i, atomic_t *v) \
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{ \
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return __atomic_##op##_barrier(i, &v->counter); \
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}
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ATOMIC_OPS(and)
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ATOMIC_OPS(or)
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ATOMIC_OPS(xor)
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#undef ATOMIC_OPS
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#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
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static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
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{
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return __atomic_cmpxchg(&v->counter, old, new);
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}
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#define ATOMIC64_INIT(i) { (i) }
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static inline long atomic64_read(const atomic64_t *v)
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{
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long c;
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asm volatile(
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" lg %0,%1\n"
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: "=d" (c) : "Q" (v->counter));
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return c;
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}
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static inline void atomic64_set(atomic64_t *v, long i)
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{
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asm volatile(
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" stg %1,%0\n"
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: "=Q" (v->counter) : "d" (i));
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}
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static inline long atomic64_add_return(long i, atomic64_t *v)
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{
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return __atomic64_add_barrier(i, &v->counter) + i;
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}
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static inline long atomic64_fetch_add(long i, atomic64_t *v)
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{
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return __atomic64_add_barrier(i, &v->counter);
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}
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static inline void atomic64_add(long i, atomic64_t *v)
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{
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#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
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if (__builtin_constant_p(i) && (i > -129) && (i < 128)) {
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__atomic64_add_const(i, &v->counter);
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return;
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}
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#endif
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__atomic64_add(i, &v->counter);
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}
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#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
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static inline long atomic64_cmpxchg(atomic64_t *v, long old, long new)
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{
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return __atomic64_cmpxchg(&v->counter, old, new);
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}
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#define ATOMIC64_OPS(op) \
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static inline void atomic64_##op(long i, atomic64_t *v) \
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{ \
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__atomic64_##op(i, &v->counter); \
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} \
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static inline long atomic64_fetch_##op(long i, atomic64_t *v) \
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{ \
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return __atomic64_##op##_barrier(i, &v->counter); \
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}
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ATOMIC64_OPS(and)
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ATOMIC64_OPS(or)
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ATOMIC64_OPS(xor)
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#undef ATOMIC64_OPS
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static inline long atomic64_dec_if_positive(atomic64_t *v)
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{
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long c, old, dec;
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c = atomic64_read(v);
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for (;;) {
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dec = c - 1;
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if (unlikely(dec < 0))
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break;
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old = atomic64_cmpxchg((v), c, dec);
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if (likely(old == c))
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break;
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c = old;
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}
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return dec;
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}
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#define atomic64_sub_return(_i, _v) atomic64_add_return(-(long)(_i), _v)
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#define atomic64_fetch_sub(_i, _v) atomic64_fetch_add(-(long)(_i), _v)
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#define atomic64_sub(_i, _v) atomic64_add(-(long)(_i), _v)
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#endif /* __ARCH_S390_ATOMIC__ */
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