e5981cd461
As seen on any other pinctrl subdriver that calls code from a main driver, each subdriver needs to have a different compatible string. We don't want the same compatible string to match a different subdriver's pinmux data as it's not for our SoC. Therefore, add new compatible strings for each pinctrl subdriver. Change driver name on all subdrivers accordingly. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20220414173916.5552-8-arinc.unal@arinc9.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
117 lines
4.0 KiB
C
117 lines
4.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include "pinctrl-ralink.h"
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#define MT7621_GPIO_MODE_UART1 1
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#define MT7621_GPIO_MODE_I2C 2
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#define MT7621_GPIO_MODE_UART3_MASK 0x3
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#define MT7621_GPIO_MODE_UART3_SHIFT 3
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#define MT7621_GPIO_MODE_UART3_GPIO 1
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#define MT7621_GPIO_MODE_UART2_MASK 0x3
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#define MT7621_GPIO_MODE_UART2_SHIFT 5
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#define MT7621_GPIO_MODE_UART2_GPIO 1
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#define MT7621_GPIO_MODE_JTAG 7
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#define MT7621_GPIO_MODE_WDT_MASK 0x3
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#define MT7621_GPIO_MODE_WDT_SHIFT 8
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#define MT7621_GPIO_MODE_WDT_GPIO 1
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#define MT7621_GPIO_MODE_PCIE_RST 0
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#define MT7621_GPIO_MODE_PCIE_REF 2
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#define MT7621_GPIO_MODE_PCIE_MASK 0x3
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#define MT7621_GPIO_MODE_PCIE_SHIFT 10
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#define MT7621_GPIO_MODE_PCIE_GPIO 1
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#define MT7621_GPIO_MODE_MDIO_MASK 0x3
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#define MT7621_GPIO_MODE_MDIO_SHIFT 12
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#define MT7621_GPIO_MODE_MDIO_GPIO 1
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#define MT7621_GPIO_MODE_RGMII1 14
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#define MT7621_GPIO_MODE_RGMII2 15
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#define MT7621_GPIO_MODE_SPI_MASK 0x3
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#define MT7621_GPIO_MODE_SPI_SHIFT 16
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#define MT7621_GPIO_MODE_SPI_GPIO 1
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#define MT7621_GPIO_MODE_SDHCI_MASK 0x3
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#define MT7621_GPIO_MODE_SDHCI_SHIFT 18
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#define MT7621_GPIO_MODE_SDHCI_GPIO 1
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static struct ralink_pmx_func uart1_func[] = { FUNC("uart1", 0, 1, 2) };
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static struct ralink_pmx_func i2c_func[] = { FUNC("i2c", 0, 3, 2) };
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static struct ralink_pmx_func uart3_func[] = {
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FUNC("uart3", 0, 5, 4),
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FUNC("i2s", 2, 5, 4),
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FUNC("spdif3", 3, 5, 4),
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};
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static struct ralink_pmx_func uart2_func[] = {
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FUNC("uart2", 0, 9, 4),
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FUNC("pcm", 2, 9, 4),
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FUNC("spdif2", 3, 9, 4),
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};
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static struct ralink_pmx_func jtag_func[] = { FUNC("jtag", 0, 13, 5) };
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static struct ralink_pmx_func wdt_func[] = {
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FUNC("wdt rst", 0, 18, 1),
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FUNC("wdt refclk", 2, 18, 1),
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};
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static struct ralink_pmx_func pcie_rst_func[] = {
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FUNC("pcie rst", MT7621_GPIO_MODE_PCIE_RST, 19, 1),
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FUNC("pcie refclk", MT7621_GPIO_MODE_PCIE_REF, 19, 1)
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};
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static struct ralink_pmx_func mdio_func[] = { FUNC("mdio", 0, 20, 2) };
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static struct ralink_pmx_func rgmii2_func[] = { FUNC("rgmii2", 0, 22, 12) };
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static struct ralink_pmx_func spi_func[] = {
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FUNC("spi", 0, 34, 7),
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FUNC("nand1", 2, 34, 7),
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};
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static struct ralink_pmx_func sdhci_func[] = {
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FUNC("sdhci", 0, 41, 8),
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FUNC("nand2", 2, 41, 8),
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};
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static struct ralink_pmx_func rgmii1_func[] = { FUNC("rgmii1", 0, 49, 12) };
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static struct ralink_pmx_group mt7621_pinmux_data[] = {
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GRP("uart1", uart1_func, 1, MT7621_GPIO_MODE_UART1),
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GRP("i2c", i2c_func, 1, MT7621_GPIO_MODE_I2C),
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GRP_G("uart3", uart3_func, MT7621_GPIO_MODE_UART3_MASK,
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MT7621_GPIO_MODE_UART3_GPIO, MT7621_GPIO_MODE_UART3_SHIFT),
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GRP_G("uart2", uart2_func, MT7621_GPIO_MODE_UART2_MASK,
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MT7621_GPIO_MODE_UART2_GPIO, MT7621_GPIO_MODE_UART2_SHIFT),
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GRP("jtag", jtag_func, 1, MT7621_GPIO_MODE_JTAG),
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GRP_G("wdt", wdt_func, MT7621_GPIO_MODE_WDT_MASK,
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MT7621_GPIO_MODE_WDT_GPIO, MT7621_GPIO_MODE_WDT_SHIFT),
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GRP_G("pcie", pcie_rst_func, MT7621_GPIO_MODE_PCIE_MASK,
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MT7621_GPIO_MODE_PCIE_GPIO, MT7621_GPIO_MODE_PCIE_SHIFT),
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GRP_G("mdio", mdio_func, MT7621_GPIO_MODE_MDIO_MASK,
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MT7621_GPIO_MODE_MDIO_GPIO, MT7621_GPIO_MODE_MDIO_SHIFT),
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GRP("rgmii2", rgmii2_func, 1, MT7621_GPIO_MODE_RGMII2),
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GRP_G("spi", spi_func, MT7621_GPIO_MODE_SPI_MASK,
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MT7621_GPIO_MODE_SPI_GPIO, MT7621_GPIO_MODE_SPI_SHIFT),
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GRP_G("sdhci", sdhci_func, MT7621_GPIO_MODE_SDHCI_MASK,
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MT7621_GPIO_MODE_SDHCI_GPIO, MT7621_GPIO_MODE_SDHCI_SHIFT),
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GRP("rgmii1", rgmii1_func, 1, MT7621_GPIO_MODE_RGMII1),
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{ 0 }
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};
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static int mt7621_pinctrl_probe(struct platform_device *pdev)
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{
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return ralink_pinctrl_init(pdev, mt7621_pinmux_data);
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}
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static const struct of_device_id mt7621_pinctrl_match[] = {
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{ .compatible = "ralink,mt7621-pinctrl" },
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{}
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};
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MODULE_DEVICE_TABLE(of, mt7621_pinctrl_match);
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static struct platform_driver mt7621_pinctrl_driver = {
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.probe = mt7621_pinctrl_probe,
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.driver = {
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.name = "mt7621-pinctrl",
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.of_match_table = mt7621_pinctrl_match,
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},
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};
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static int __init mt7621_pinctrl_init(void)
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{
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return platform_driver_register(&mt7621_pinctrl_driver);
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}
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core_initcall_sync(mt7621_pinctrl_init);
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