There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568 -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKOp8cACgkQmmx57+YA GNk33hAAn/mY+QDyj8sUwtY4AAVtut2QgyBm7NBWLgiYDQx52yBwP7rUxeKyDqZF q6LK5z3NA7NN5REpfn6WKBEFo6wkzTzg4Gev/h+9hwLyozch8vl4etBfZGak4A7m cLCONZdw4FMCQ10oLq+ib/WJeJv2W700307OkJ3dN73qdbWLRF1hoyG+uMTHuEqL If755IR+EYhxYz8CfJhCYb2BcqhRq047n3sEqolZpFtz5oHUW2dADASgWpV+3yNc ql8cH0f5OTKbFS1lM4k7cWbMW2vHWx7jZnXZDyMfy3EE5SOb4V/s9JFJSS1pAfPQ OWuq194LT+SIXTTT3DQ+lSNcMhlkyeXQ0JQE1wAAp0vov4V8vHGvEGk0MCku5QHp zKKONPfcn9aoWtsh4GaCvt0cP0m7lKyjxJvNSjBy2C9dVW8t4UlIVZr+V8hR2Ufp SpCCzMbttrcUK6rHzQmWsR563mhfszzuzDfZi4RK2aFLJKhFi5hEQF2tDxLq8Y09 vIY/OkRpSwahgbiyj/zhKrJtnhFHh1m6wZJG+Sk9lTJikEhaRinriy0lgu08xssG krBHPOVhNY11rqlzosBU39JOya1/J2iTxjo7ccNmGfO4MDanE+Cl41a5wSNjciw1 ihi2zAUBClGg0TnQ+HJylFPS3ZFyGEtbYH/d6td25DtwaaIsaxU= =LsM7 -----END PGP SIGNATURE----- Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM DT updates from Arnd Bergmann: "There are 40 branches this time, adding a lot of new hardware support, and cleanups. Krzysztof Kozlowski continues his treewide cleanups. There are a number of new SoCs, all of them as part of existing families, and typically added along with a reference board: - Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L general-purpose MPU. - Renesas RZ/V2M (R9A09G011) is a smart camera SoC - Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76 cores and deep learning accerlation. - Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7 and dual Wifi-6. - Corstone1000 is a generic platform from Arm that is used for designing custom SoCs, the support for now is for the Fixed Virtual Platform emulation for it. - Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in upcoming Chromebooks. - NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first MMU-less SoC to be added in a while New machines based on already supported SoCs this time are mainly for 32-bit platforms and include: - Two wireless routers based on Broadcom bcm4708 - 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly for the industrial embedded market, and on NXP LS1021A based IOT board. - Two ethernet switches based on Microchip LAN966 - Eight Qualcomm Snapdragon based machines, including a smartwatch, a Chromebook board and some phones - Another phone based on the old ST-Ericsson Ux500 platform - Seven STM32MP1 based boards - Four single-board computers based on Rockchip RK3566/RK3568" * tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits) ARM: dts: kswitch-d10: enable networking ARM: dts: lan966x: add switch node ARM: dts: lan966x: add serdes node ARM: dts: lan966x: add reset switch reset node ARM: dts: lan966x: add MIIM nodes ARM: dts: lan966x: add hwmon node ARM: dts: lan966x: add basic Kontron KSwitch D10 support ARM: dts: lan966x: add flexcom I2C nodes ARM: dts: lan966x: add flexcom SPI nodes ARM: dts: lan966x: add all flexcom usart nodes ARM: dts: lan966x: add missing uart DMA channel ARM: dts: lan966x: add sgpio node ARM: dts: lan966x: swap dma channels for crypto node ARM: dts: lan966x: rename pinctrl nodes ARM: dts: at91: sama7g5: remove interrupt-parent from gic node ARM: dts: at91: use generic node name for dataflash ARM: dts: turris-omnia: Add atsha204a node arm64: dts: mt8192: Follow binding order for SCP registers arm64: dts: mediatek: add mtk-snfi for mt7622 arm64: dts: mediatek: mt8195-demo: enable uart1 ...
297 lines
8.6 KiB
Plaintext
297 lines
8.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-only
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#include <dt-bindings/input/input.h>
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/ {
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cpus {
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cpu@0 {
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cpu0-supply = <&vcc>;
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};
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};
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memory@80000000 {
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device_type = "memory";
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reg = <0x80000000 0>;
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};
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wl12xx_vmmc: wl12xx_vmmc {
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compatible = "regulator-fixed";
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regulator-name = "vwl1271";
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regulator-min-microvolt = <1800000>;
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regulator-max-microvolt = <1800000>;
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gpio = <&gpio1 3 0>; /* gpio_3 */
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startup-delay-us = <70000>;
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enable-active-high;
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vin-supply = <&vaux3>;
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};
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/* HS USB Host PHY on PORT 1 */
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hsusb2_phy: hsusb2_phy {
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pinctrl-names = "default";
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pinctrl-0 = <&hsusb2_reset_pin>;
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; /* gpio_4 */
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#phy-cells = <0>;
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};
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/* fixed 26MHz oscillator */
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hfclk_26m: oscillator {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <26000000>;
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};
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};
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&gpmc {
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ranges = <0 0 0x30000000 0x1000000>; /* CS0: 16MB for NAND */
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nand@0,0 {
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compatible = "ti,omap2-nand";
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reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
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interrupt-parent = <&gpmc>;
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interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
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<1 IRQ_TYPE_NONE>; /* termcount */
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linux,mtd-name = "micron,mt29f4g16abbda3w";
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nand-bus-width = <16>;
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ti,nand-ecc-opt = "bch8";
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rb-gpios = <&gpmc 0 GPIO_ACTIVE_HIGH>; /* gpmc_wait0 */
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gpmc,sync-clk-ps = <0>;
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gpmc,cs-on-ns = <0>;
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gpmc,cs-rd-off-ns = <44>;
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gpmc,cs-wr-off-ns = <44>;
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gpmc,adv-on-ns = <6>;
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gpmc,adv-rd-off-ns = <34>;
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gpmc,adv-wr-off-ns = <44>;
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gpmc,we-off-ns = <40>;
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gpmc,oe-off-ns = <54>;
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gpmc,access-ns = <64>;
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gpmc,rd-cycle-ns = <82>;
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gpmc,wr-cycle-ns = <82>;
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gpmc,wr-access-ns = <40>;
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gpmc,wr-data-mux-bus-ns = <0>;
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gpmc,device-width = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&i2c1 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c1_pins>;
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clock-frequency = <2600000>;
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twl: twl@48 {
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reg = <0x48>;
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interrupts = <7>; /* SYS_NIRQ cascaded to intc */
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interrupt-parent = <&intc>;
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clocks = <&hfclk_26m>;
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clock-names = "fck";
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twl_audio: audio {
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compatible = "ti,twl4030-audio";
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codec {
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ti,hs_extmute_gpio = <&gpio2 25 GPIO_ACTIVE_HIGH>;
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};
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};
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};
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};
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&i2c2 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c2_pins>;
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clock-frequency = <400000>;
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};
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&i2c3 {
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pinctrl-names = "default";
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pinctrl-0 = <&i2c3_pins>;
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clock-frequency = <400000>;
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touchscreen: tsc2004@48 {
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compatible = "ti,tsc2004";
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reg = <0x48>;
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vio-supply = <&vaux1>;
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pinctrl-names = "default";
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pinctrl-0 = <&tsc2004_pins>;
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interrupts-extended = <&gpio5 25 IRQ_TYPE_EDGE_RISING>; /* gpio 153 */
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touchscreen-fuzz-x = <4>;
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touchscreen-fuzz-y = <7>;
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touchscreen-fuzz-pressure = <2>;
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touchscreen-size-x = <4096>;
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touchscreen-size-y = <4096>;
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touchscreen-max-pressure = <2048>;
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ti,x-plate-ohms = <280>;
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ti,esd-recovery-timeout-ms = <8000>;
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};
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};
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&mmc3 {
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interrupts-extended = <&intc 94 &omap3_pmx_core 0x136>;
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pinctrl-0 = <&mmc3_pins &wl127x_gpio>;
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pinctrl-names = "default";
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vmmc-supply = <&wl12xx_vmmc>;
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non-removable;
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bus-width = <4>;
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cap-power-off-card;
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#address-cells = <1>;
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#size-cells = <0>;
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wlcore: wlcore@2 {
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compatible = "ti,wl1273";
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reg = <2>;
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interrupt-parent = <&gpio1>;
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interrupts = <2 IRQ_TYPE_EDGE_RISING>; /* gpio 2 */
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ref-clock-frequency = <26000000>;
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};
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};
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&usbhshost {
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pinctrl-names = "default";
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pinctrl-0 = <&hsusb2_pins>;
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port2-mode = "ehci-phy";
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};
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&usbhsehci {
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phys = <0 &hsusb2_phy>;
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};
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&omap3_pmx_core {
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mmc3_pins: pinmux_mm3_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2164, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat4.sdmmc3_dat0 */
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OMAP3_CORE1_IOPAD(0x2166, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat5.sdmmc3_dat1 */
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OMAP3_CORE1_IOPAD(0x2168, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat2 */
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OMAP3_CORE1_IOPAD(0x216a, PIN_INPUT_PULLUP | MUX_MODE3) /* sdmmc2_dat6.sdmmc3_dat3 */
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OMAP3_CORE1_IOPAD(0x21d0, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs1.sdmmc3_cmd */
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OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT_PULLUP | MUX_MODE3) /* mcspi1_cs2.sdmmc_clk */
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>;
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};
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mcbsp2_pins: pinmux_mcbsp2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0) /* mcbsp2_fsx */
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OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0) /* mcbsp2_clkx */
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OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0) /* mcbsp2_dr */
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OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0) /* mcbsp2_dx */
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>;
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};
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uart2_pins: pinmux_uart2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2174, PIN_INPUT | MUX_MODE0) /* uart2_cts.uart2_cts */
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OMAP3_CORE1_IOPAD(0x2176, PIN_OUTPUT | MUX_MODE0) /* uart2_rts .uart2_rts*/
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OMAP3_CORE1_IOPAD(0x2178, PIN_OUTPUT | MUX_MODE0) /* uart2_tx.uart2_tx */
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OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */
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OMAP3_CORE1_IOPAD(0x2198, PIN_OUTPUT | MUX_MODE4) /* GPIO_162,BT_EN */
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>;
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};
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mcspi1_pins: pinmux_mcspi1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21c8, PIN_INPUT | MUX_MODE0) /* mcspi1_clk.mcspi1_clk */
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OMAP3_CORE1_IOPAD(0x21ca, PIN_OUTPUT | MUX_MODE0) /* mcspi1_simo.mcspi1_simo */
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OMAP3_CORE1_IOPAD(0x21cc, PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi1_somi.mcspi1_somi */
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OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0) /* mcspi1_cs0.mcspi1_cs0 */
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>;
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};
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hsusb2_pins: pinmux_hsusb2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
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OMAP3_CORE1_IOPAD(0x21d6, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_clk.hsusb2_data7 */
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OMAP3_CORE1_IOPAD(0x21d8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_simo.hsusb2_data4 */
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OMAP3_CORE1_IOPAD(0x21da, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_somi.hsusb2_data5 */
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OMAP3_CORE1_IOPAD(0x21dc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs0.hsusb2_data6 */
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OMAP3_CORE1_IOPAD(0x21de, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi2_cs1.hsusb2_data3 */
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>;
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};
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hsusb_otg_pins: pinmux_hsusb_otg_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0) /* hsusb0_clk.hsusb0_clk */
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OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0) /* hsusb0_stp.hsusb0_stp */
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OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0) /* hsusb0_dir.hsusb0_dir */
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OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0) /* hsusb0_nxt.hsusb0_nxt */
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OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0) /* hsusb0_data0.hsusb0_data0 */
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OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0) /* hsusb0_data1.hsusb0_data1 */
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OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0) /* hsusb0_data2.hsusb0_data2 */
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OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0) /* hsusb0_data3.hsusb0_data3 */
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OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0) /* hsusb0_data4.hsusb0_data4 */
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OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0) /* hsusb0_data5.hsusb0_data5 */
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OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0) /* hsusb0_data6.hsusb0_data6 */
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OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0) /* hsusb0_data7.hsusb0_data7 */
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>;
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};
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i2c1_pins: pinmux_i2c1_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */
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OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0) /* i2c1_sda.i2c1_sda */
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OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */
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>;
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};
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i2c2_pins: pinmux_i2c2_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT | MUX_MODE0) /* i2c2_scl */
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OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT | MUX_MODE0) /* i2c2_sda */
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>;
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};
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i2c3_pins: pinmux_i2c3_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0) /* i2c3_scl */
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OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0) /* i2c3_sda */
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>;
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};
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tsc2004_pins: pinmux_tsc2004_pins {
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pinctrl-single,pins = <
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OMAP3_CORE1_IOPAD(0x2186, PIN_INPUT | MUX_MODE4) /* mcbsp4_dr.gpio_153 */
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>;
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};
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};
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&omap3_pmx_wkup {
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hsusb2_reset_pin: pinmux_hsusb1_reset_pin {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a0e, PIN_OUTPUT | MUX_MODE4) /* sys_boot2.gpio_4 */
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>;
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};
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wl127x_gpio: pinmux_wl127x_gpio_pin {
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pinctrl-single,pins = <
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OMAP3_WKUP_IOPAD(0x2a0a, PIN_INPUT | MUX_MODE4) /* sys_boot0.gpio_2 */
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OMAP3_WKUP_IOPAD(0x2a0c, PIN_OUTPUT | MUX_MODE4) /* sys_boot1.gpio_3 */
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>;
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};
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};
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&uart2 {
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interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
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pinctrl-names = "default";
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pinctrl-0 = <&uart2_pins>;
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};
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&mcspi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcspi1_pins>;
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};
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#include "twl4030.dtsi"
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#include "twl4030_omap3.dtsi"
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&vaux3 {
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regulator-min-microvolt = <2800000>;
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regulator-max-microvolt = <2800000>;
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};
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&twl {
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twl_power: power {
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compatible = "ti,twl4030-power-idle-osc-off", "ti,twl4030-power-idle";
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ti,use_poweroff;
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};
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};
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&twl_gpio {
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ti,use-leds;
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};
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