George Shen 9af611f290 drm/amd/display: Fix DCN32 DPSTREAMCLK_CNTL programming
[Why]
Each index in the DPSTREAMCLK_CNTL register
phyiscally maps 1-to-1 with HPO stream encoder
instance. On the other hand, each index in
DTBCLK_P_CNTL physically maps 1-to-1 with OTG
instance.

Current DCN32 DPSTREAMCLK_CLK programing assumes
that OTG instance always maps 1-to-1 with
HPO stream encoder instance. This is not always
guaranteed and can result in blackscreen.

[How]
Program the correct dpstreamclk instance with
the correct dtbclk_p source.

Reviewed-by: Ariel Bernstein <Eric.Bernstein@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: George Shen <george.shen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-08-29 17:45:10 -04:00
2022-06-21 12:13:53 -05:00
2022-07-10 09:14:54 -07:00
2022-07-13 10:54:56 +10:00
2022-07-10 13:55:49 -07:00
2022-07-08 12:55:25 -07:00
2022-07-13 14:17:35 +10:00
2022-07-10 14:40:51 -07:00

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