linux

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Linus Torvalds 9b59ec8d50 RISC-V Fixes for 5.19-rc7

* A fix to avoid printing a warning when modules do not exercise any
   errata-dependent behavior and the SiFive errata are enabled.
 * A fix to the Microchip PFSOC to attach the L2 cache to the CPU nodes.
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Merge tag 'riscv-for-linus-5.19-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:

 - A fix to avoid printing a warning when modules do not exercise any
   errata-dependent behavior and the SiFive errata are enabled.

 - A fix to the Microchip PFSOC to attach the L2 cache to the CPU nodes.

* tag 'riscv-for-linus-5.19-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  riscv: don't warn for sifive erratas in modules
  riscv: dts: microchip: hook up the mpfs' l2cache

2022-07-15 10:40:50 -07:00

alpha

Cleanups (and one fix) around struct mount handling.

2022-06-04 19:00:05 -07:00

arc

This set of changes updates init and user mode helper tasks to be

2022-06-03 16:03:05 -07:00

arm

ARM: SoC fixes for 5.19, part 3

2022-07-15 10:16:44 -07:00

arm64

ARM: SoC fixes for 5.19, part 3