ac4aa9dbc7
Add driver for MediaTek's XFI T-PHY which can be found in the MT7988 SoC. The XFI T-PHY is a 10 Gigabit/s Ethernet SerDes PHY with muxes on the internal side to be used with either USXGMII PCS or LynxI PCS, depending on the selected PHY interface mode. The PHY can operates only in PHY_MODE_ETHERNET, the submode is one of PHY_INTERFACE_MODE_* corresponding to the supported modes: * USXGMII \ * 10GBase-R }- USXGMII PCS - XGDM \ * 5GBase-R / \ }- Ethernet MAC * 2500Base-X \ / * 1000Base-X }- LynxI PCS - GDM / * Cisco SGMII (MAC side) / I chose the name XFI T-PHY because names of functions dealing with the phy in the vendor driver are prefixed "xfi_pextp_". The register space used by the phy is called "pextp" in the vendor sources, which could be read as "_P_CI _ex_press _T_-_P_hy", and that is quite misleading as this phy isn't used for anything related to PCIe, so I wanted to find a better name. XFI is still somehow related (as in: you would find the relevant places using grep in the vendor driver when looking for that) and the term seemed to at least somehow be aligned with the function of that phy: Dealing with (up to) 10 Gbit/s Ethernet serialized differential signals. In order to work-around a performance issue present on the first of two XFI T-PHYs found in MT7988, special tuning is applied which can be selected by adding the 'mediatek,usxgmii-performance-errata' property to the device tree node, similar to how the vendor driver is doing that too. There is no documentation for most registers used for the analog/tuning part, however, most of the registers have been partially reverse-engineered from MediaTek's SDK implementation (see links, an opaque sequence of 32-bit register writes) and descriptions for all relevant digital registers and bits such as resets and muxes have been supplied by MediaTek. Link: |
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.. | ||
Kconfig | ||
Makefile | ||
phy-mtk-dp.c | ||
phy-mtk-hdmi-mt2701.c | ||
phy-mtk-hdmi-mt8173.c | ||
phy-mtk-hdmi-mt8195.c | ||
phy-mtk-hdmi-mt8195.h | ||
phy-mtk-hdmi.c | ||
phy-mtk-hdmi.h | ||
phy-mtk-io.h | ||
phy-mtk-mipi-csi-0-5-rx-reg.h | ||
phy-mtk-mipi-csi-0-5.c | ||
phy-mtk-mipi-dsi-mt8173.c | ||
phy-mtk-mipi-dsi-mt8183.c | ||
phy-mtk-mipi-dsi.c | ||
phy-mtk-mipi-dsi.h | ||
phy-mtk-pcie.c | ||
phy-mtk-tphy.c | ||
phy-mtk-ufs.c | ||
phy-mtk-xfi-tphy.c | ||
phy-mtk-xsphy.c |