9952f6918d
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 228 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
100 lines
2.1 KiB
C
100 lines
2.1 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2013-2014, NVIDIA CORPORATION. All rights reserved.
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*/
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#include <linux/bug.h>
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <soc/tegra/fuse.h>
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#include "fuse.h"
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#define SOC_PROCESS_CORNERS 2
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#define CPU_PROCESS_CORNERS 2
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enum {
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THRESHOLD_INDEX_0,
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THRESHOLD_INDEX_1,
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THRESHOLD_INDEX_COUNT,
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};
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static const u32 __initconst soc_process_speedos[][SOC_PROCESS_CORNERS] = {
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{1123, UINT_MAX},
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{0, UINT_MAX},
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};
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static const u32 __initconst cpu_process_speedos[][CPU_PROCESS_CORNERS] = {
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{1695, UINT_MAX},
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{0, UINT_MAX},
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};
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static void __init rev_sku_to_speedo_ids(struct tegra_sku_info *sku_info,
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int *threshold)
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{
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u32 tmp;
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u32 sku = sku_info->sku_id;
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enum tegra_revision rev = sku_info->revision;
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switch (sku) {
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case 0x00:
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case 0x10:
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case 0x05:
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case 0x06:
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sku_info->cpu_speedo_id = 1;
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sku_info->soc_speedo_id = 0;
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*threshold = THRESHOLD_INDEX_0;
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break;
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case 0x03:
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case 0x04:
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sku_info->cpu_speedo_id = 2;
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sku_info->soc_speedo_id = 1;
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*threshold = THRESHOLD_INDEX_1;
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break;
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default:
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pr_err("Tegra Unknown SKU %d\n", sku);
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sku_info->cpu_speedo_id = 0;
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sku_info->soc_speedo_id = 0;
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*threshold = THRESHOLD_INDEX_0;
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break;
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}
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if (rev == TEGRA_REVISION_A01) {
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tmp = tegra_fuse_read_early(0x270) << 1;
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tmp |= tegra_fuse_read_early(0x26c);
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if (!tmp)
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sku_info->cpu_speedo_id = 0;
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}
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}
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void __init tegra114_init_speedo_data(struct tegra_sku_info *sku_info)
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{
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u32 cpu_speedo_val;
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u32 soc_speedo_val;
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int threshold;
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int i;
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BUILD_BUG_ON(ARRAY_SIZE(cpu_process_speedos) !=
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THRESHOLD_INDEX_COUNT);
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BUILD_BUG_ON(ARRAY_SIZE(soc_process_speedos) !=
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THRESHOLD_INDEX_COUNT);
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rev_sku_to_speedo_ids(sku_info, &threshold);
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cpu_speedo_val = tegra_fuse_read_early(0x12c) + 1024;
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soc_speedo_val = tegra_fuse_read_early(0x134);
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for (i = 0; i < CPU_PROCESS_CORNERS; i++)
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if (cpu_speedo_val < cpu_process_speedos[threshold][i])
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break;
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sku_info->cpu_process_id = i;
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for (i = 0; i < SOC_PROCESS_CORNERS; i++)
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if (soc_speedo_val < soc_process_speedos[threshold][i])
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break;
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sku_info->soc_process_id = i;
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}
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