Anup Patel 9d05c1fee8 RISC-V: KVM: Implement stage2 page table programming ...

This patch implements all required functions for programming
the stage2 page table for each Guest/VM.

At high-level, the flow of stage2 related functions is similar
from KVM ARM/ARM64 implementation but the stage2 page table
format is quite different for KVM RISC-V.

[jiangyifei: stage2 dirty log support]
Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Acked-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>

2021-10-04 16:02:19 +05:30

..

boot

riscv: dts: microchip: mpfs-icicle: Fix serial console

2021-09-10 23:58:19 -07:00

configs

riscv: defconfig: enable NLS_CODEPAGE_437, NLS_ISO8859_1

2021-09-10 21:31:12 -07:00

errata

riscv: skip errata_cip_453.o if CONFIG_ERRATA_SIFIVE_CIP_453 is disabled

2021-06-01 21:16:41 -07:00

include

RISC-V: KVM: Implement stage2 page table programming

2021-10-04 16:02:19 +05:30

kernel

RISC-V: KVM: Handle MMIO exits for VCPU

2021-10-04 15:51:47 +05:30

kvm

RISC-V: KVM: Implement stage2 page table programming

2021-10-04 16:02:19 +05:30

lib

riscv: __asm_copy_to-from_user: Fix: Typos in comments

2021-07-23 17:49:12 -07:00

mm

RISC-V Patches for the 5.15 Merge Window, Part 1

2021-09-05 11:31:23 -07:00

net

bpf: Introduce BPF nospec instruction for mitigating Spectre v4

2021-07-29 00:20:56 +02:00

Kbuild

riscv: Allow device trees to be built into the kernel

2020-05-18 11:38:05 -07:00

Kconfig

RISC-V: Add initial skeletal KVM support

2021-10-04 15:40:08 +05:30

Kconfig.debug

RISC-V: Remove EARLY_PRINTK support

2018-12-17 10:23:46 -08:00

Kconfig.erratas

riscv: enable SiFive errata CIP-453 and CIP-1200 Kconfig only if CONFIG_64BIT=y

2021-05-06 09:40:13 -07:00

Kconfig.socs

riscv: sifive: fix Kconfig errata warning

2021-06-12 17:20:50 -07:00

Makefile

RISC-V: Add initial skeletal KVM support

2021-10-04 15:40:08 +05:30