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Currently the rxe driver has a rxe_mw struct object but nothing about memory windows is enabled. This patch turns on memory windows and some minor cleanup. Set device attribute in rxe.c so max_mw = MAX_MW. Change parameters in rxe_param.h so that MAX_MW is the same as MAX_MR. Reduce the number of MRs and MWs to 4K from 256K. Add device capability bits for 2a and 2b memory windows. Removed RXE_MR_TYPE_MW from the rxe_mr_type enum. Link: https://lore.kernel.org/r/20210608042552.33275-4-rpearsonhpe@gmail.com Signed-off-by: Bob Pearson <rpearsonhpe@gmail.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
312 lines
7.6 KiB
C
312 lines
7.6 KiB
C
// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
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/*
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* Copyright (c) 2016 Mellanox Technologies Ltd. All rights reserved.
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* Copyright (c) 2015 System Fabric Works, Inc. All rights reserved.
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*/
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#include <rdma/rdma_netlink.h>
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#include <net/addrconf.h>
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#include "rxe.h"
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#include "rxe_loc.h"
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MODULE_AUTHOR("Bob Pearson, Frank Zago, John Groves, Kamal Heib");
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MODULE_DESCRIPTION("Soft RDMA transport");
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MODULE_LICENSE("Dual BSD/GPL");
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bool rxe_initialized;
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/* free resources for a rxe device all objects created for this device must
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* have been destroyed
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*/
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void rxe_dealloc(struct ib_device *ib_dev)
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{
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struct rxe_dev *rxe = container_of(ib_dev, struct rxe_dev, ib_dev);
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rxe_pool_cleanup(&rxe->uc_pool);
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rxe_pool_cleanup(&rxe->pd_pool);
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rxe_pool_cleanup(&rxe->ah_pool);
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rxe_pool_cleanup(&rxe->srq_pool);
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rxe_pool_cleanup(&rxe->qp_pool);
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rxe_pool_cleanup(&rxe->cq_pool);
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rxe_pool_cleanup(&rxe->mr_pool);
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rxe_pool_cleanup(&rxe->mw_pool);
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rxe_pool_cleanup(&rxe->mc_grp_pool);
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rxe_pool_cleanup(&rxe->mc_elem_pool);
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if (rxe->tfm)
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crypto_free_shash(rxe->tfm);
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}
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/* initialize rxe device parameters */
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static void rxe_init_device_param(struct rxe_dev *rxe)
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{
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rxe->max_inline_data = RXE_MAX_INLINE_DATA;
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rxe->attr.vendor_id = RXE_VENDOR_ID;
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rxe->attr.max_mr_size = RXE_MAX_MR_SIZE;
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rxe->attr.page_size_cap = RXE_PAGE_SIZE_CAP;
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rxe->attr.max_qp = RXE_MAX_QP;
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rxe->attr.max_qp_wr = RXE_MAX_QP_WR;
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rxe->attr.device_cap_flags = RXE_DEVICE_CAP_FLAGS;
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rxe->attr.max_send_sge = RXE_MAX_SGE;
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rxe->attr.max_recv_sge = RXE_MAX_SGE;
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rxe->attr.max_sge_rd = RXE_MAX_SGE_RD;
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rxe->attr.max_cq = RXE_MAX_CQ;
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rxe->attr.max_cqe = (1 << RXE_MAX_LOG_CQE) - 1;
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rxe->attr.max_mr = RXE_MAX_MR;
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rxe->attr.max_mw = RXE_MAX_MW;
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rxe->attr.max_pd = RXE_MAX_PD;
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rxe->attr.max_qp_rd_atom = RXE_MAX_QP_RD_ATOM;
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rxe->attr.max_res_rd_atom = RXE_MAX_RES_RD_ATOM;
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rxe->attr.max_qp_init_rd_atom = RXE_MAX_QP_INIT_RD_ATOM;
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rxe->attr.atomic_cap = IB_ATOMIC_HCA;
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rxe->attr.max_mcast_grp = RXE_MAX_MCAST_GRP;
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rxe->attr.max_mcast_qp_attach = RXE_MAX_MCAST_QP_ATTACH;
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rxe->attr.max_total_mcast_qp_attach = RXE_MAX_TOT_MCAST_QP_ATTACH;
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rxe->attr.max_ah = RXE_MAX_AH;
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rxe->attr.max_srq = RXE_MAX_SRQ;
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rxe->attr.max_srq_wr = RXE_MAX_SRQ_WR;
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rxe->attr.max_srq_sge = RXE_MAX_SRQ_SGE;
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rxe->attr.max_fast_reg_page_list_len = RXE_MAX_FMR_PAGE_LIST_LEN;
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rxe->attr.max_pkeys = RXE_MAX_PKEYS;
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rxe->attr.local_ca_ack_delay = RXE_LOCAL_CA_ACK_DELAY;
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addrconf_addr_eui48((unsigned char *)&rxe->attr.sys_image_guid,
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rxe->ndev->dev_addr);
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rxe->max_ucontext = RXE_MAX_UCONTEXT;
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}
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/* initialize port attributes */
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static void rxe_init_port_param(struct rxe_port *port)
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{
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port->attr.state = IB_PORT_DOWN;
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port->attr.max_mtu = IB_MTU_4096;
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port->attr.active_mtu = IB_MTU_256;
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port->attr.gid_tbl_len = RXE_PORT_GID_TBL_LEN;
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port->attr.port_cap_flags = RXE_PORT_PORT_CAP_FLAGS;
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port->attr.max_msg_sz = RXE_PORT_MAX_MSG_SZ;
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port->attr.bad_pkey_cntr = RXE_PORT_BAD_PKEY_CNTR;
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port->attr.qkey_viol_cntr = RXE_PORT_QKEY_VIOL_CNTR;
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port->attr.pkey_tbl_len = RXE_PORT_PKEY_TBL_LEN;
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port->attr.lid = RXE_PORT_LID;
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port->attr.sm_lid = RXE_PORT_SM_LID;
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port->attr.lmc = RXE_PORT_LMC;
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port->attr.max_vl_num = RXE_PORT_MAX_VL_NUM;
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port->attr.sm_sl = RXE_PORT_SM_SL;
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port->attr.subnet_timeout = RXE_PORT_SUBNET_TIMEOUT;
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port->attr.init_type_reply = RXE_PORT_INIT_TYPE_REPLY;
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port->attr.active_width = RXE_PORT_ACTIVE_WIDTH;
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port->attr.active_speed = RXE_PORT_ACTIVE_SPEED;
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port->attr.phys_state = RXE_PORT_PHYS_STATE;
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port->mtu_cap = ib_mtu_enum_to_int(IB_MTU_256);
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port->subnet_prefix = cpu_to_be64(RXE_PORT_SUBNET_PREFIX);
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}
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/* initialize port state, note IB convention that HCA ports are always
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* numbered from 1
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*/
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static void rxe_init_ports(struct rxe_dev *rxe)
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{
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struct rxe_port *port = &rxe->port;
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rxe_init_port_param(port);
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addrconf_addr_eui48((unsigned char *)&port->port_guid,
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rxe->ndev->dev_addr);
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spin_lock_init(&port->port_lock);
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}
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/* init pools of managed objects */
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static int rxe_init_pools(struct rxe_dev *rxe)
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{
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int err;
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err = rxe_pool_init(rxe, &rxe->uc_pool, RXE_TYPE_UC,
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rxe->max_ucontext);
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if (err)
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goto err1;
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err = rxe_pool_init(rxe, &rxe->pd_pool, RXE_TYPE_PD,
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rxe->attr.max_pd);
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if (err)
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goto err2;
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err = rxe_pool_init(rxe, &rxe->ah_pool, RXE_TYPE_AH,
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rxe->attr.max_ah);
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if (err)
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goto err3;
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err = rxe_pool_init(rxe, &rxe->srq_pool, RXE_TYPE_SRQ,
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rxe->attr.max_srq);
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if (err)
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goto err4;
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err = rxe_pool_init(rxe, &rxe->qp_pool, RXE_TYPE_QP,
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rxe->attr.max_qp);
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if (err)
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goto err5;
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err = rxe_pool_init(rxe, &rxe->cq_pool, RXE_TYPE_CQ,
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rxe->attr.max_cq);
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if (err)
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goto err6;
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err = rxe_pool_init(rxe, &rxe->mr_pool, RXE_TYPE_MR,
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rxe->attr.max_mr);
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if (err)
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goto err7;
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err = rxe_pool_init(rxe, &rxe->mw_pool, RXE_TYPE_MW,
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rxe->attr.max_mw);
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if (err)
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goto err8;
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err = rxe_pool_init(rxe, &rxe->mc_grp_pool, RXE_TYPE_MC_GRP,
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rxe->attr.max_mcast_grp);
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if (err)
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goto err9;
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err = rxe_pool_init(rxe, &rxe->mc_elem_pool, RXE_TYPE_MC_ELEM,
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rxe->attr.max_total_mcast_qp_attach);
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if (err)
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goto err10;
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return 0;
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err10:
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rxe_pool_cleanup(&rxe->mc_grp_pool);
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err9:
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rxe_pool_cleanup(&rxe->mw_pool);
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err8:
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rxe_pool_cleanup(&rxe->mr_pool);
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err7:
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rxe_pool_cleanup(&rxe->cq_pool);
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err6:
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rxe_pool_cleanup(&rxe->qp_pool);
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err5:
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rxe_pool_cleanup(&rxe->srq_pool);
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err4:
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rxe_pool_cleanup(&rxe->ah_pool);
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err3:
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rxe_pool_cleanup(&rxe->pd_pool);
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err2:
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rxe_pool_cleanup(&rxe->uc_pool);
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err1:
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return err;
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}
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/* initialize rxe device state */
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static int rxe_init(struct rxe_dev *rxe)
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{
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int err;
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/* init default device parameters */
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rxe_init_device_param(rxe);
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rxe_init_ports(rxe);
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err = rxe_init_pools(rxe);
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if (err)
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return err;
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/* init pending mmap list */
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spin_lock_init(&rxe->mmap_offset_lock);
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spin_lock_init(&rxe->pending_lock);
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INIT_LIST_HEAD(&rxe->pending_mmaps);
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mutex_init(&rxe->usdev_lock);
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return 0;
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}
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void rxe_set_mtu(struct rxe_dev *rxe, unsigned int ndev_mtu)
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{
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struct rxe_port *port = &rxe->port;
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enum ib_mtu mtu;
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mtu = eth_mtu_int_to_enum(ndev_mtu);
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/* Make sure that new MTU in range */
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mtu = mtu ? min_t(enum ib_mtu, mtu, IB_MTU_4096) : IB_MTU_256;
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port->attr.active_mtu = mtu;
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port->mtu_cap = ib_mtu_enum_to_int(mtu);
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}
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/* called by ifc layer to create new rxe device.
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* The caller should allocate memory for rxe by calling ib_alloc_device.
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*/
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int rxe_add(struct rxe_dev *rxe, unsigned int mtu, const char *ibdev_name)
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{
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int err;
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err = rxe_init(rxe);
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if (err)
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return err;
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rxe_set_mtu(rxe, mtu);
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return rxe_register_device(rxe, ibdev_name);
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}
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static int rxe_newlink(const char *ibdev_name, struct net_device *ndev)
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{
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struct rxe_dev *exists;
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int err = 0;
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if (is_vlan_dev(ndev)) {
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pr_err("rxe creation allowed on top of a real device only\n");
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err = -EPERM;
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goto err;
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}
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exists = rxe_get_dev_from_net(ndev);
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if (exists) {
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ib_device_put(&exists->ib_dev);
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pr_err("already configured on %s\n", ndev->name);
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err = -EEXIST;
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goto err;
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}
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err = rxe_net_add(ibdev_name, ndev);
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if (err) {
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pr_err("failed to add %s\n", ndev->name);
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goto err;
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}
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err:
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return err;
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}
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static struct rdma_link_ops rxe_link_ops = {
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.type = "rxe",
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.newlink = rxe_newlink,
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};
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static int __init rxe_module_init(void)
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{
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int err;
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err = rxe_net_init();
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if (err)
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return err;
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rdma_link_register(&rxe_link_ops);
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rxe_initialized = true;
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pr_info("loaded\n");
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return 0;
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}
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static void __exit rxe_module_exit(void)
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{
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rdma_link_unregister(&rxe_link_ops);
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ib_unregister_driver(RDMA_DRIVER_RXE);
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rxe_net_exit();
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rxe_initialized = false;
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pr_info("unloaded\n");
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}
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late_initcall(rxe_module_init);
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module_exit(rxe_module_exit);
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MODULE_ALIAS_RDMA_LINK("rxe");
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