080990aa33
The AMD side of the loader issues the microcode revision for each logical thread on the system, which can become really noisy on huge machines. And doing that doesn't make a whole lot of sense - the microcode revision is already in /proc/cpuinfo. So in case one is interested in the theoretical support of mixed silicon steppings on AMD, one can check there. What is also missing on the AMD side - something which people have requested before - is showing the microcode revision the CPU had *before* the early update. So abstract that up in the main code and have the BSP on each vendor provide those revision numbers. Then, dump them only once on driver init. On Intel, do not dump the patch date - it is not needed. Reported-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/CAHk-=wg=%2B8rceshMkB4VnKxmRccVLtBLPBawnewZuuqyx5U=3A@mail.gmail.com
129 lines
3.8 KiB
C
129 lines
3.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _X86_MICROCODE_INTERNAL_H
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#define _X86_MICROCODE_INTERNAL_H
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#include <linux/earlycpio.h>
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#include <linux/initrd.h>
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#include <asm/cpu.h>
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#include <asm/microcode.h>
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struct device;
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enum ucode_state {
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UCODE_OK = 0,
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UCODE_NEW,
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UCODE_NEW_SAFE,
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UCODE_UPDATED,
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UCODE_NFOUND,
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UCODE_ERROR,
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UCODE_TIMEOUT,
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UCODE_OFFLINE,
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};
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struct microcode_ops {
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enum ucode_state (*request_microcode_fw)(int cpu, struct device *dev);
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void (*microcode_fini_cpu)(int cpu);
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/*
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* The generic 'microcode_core' part guarantees that the callbacks
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* below run on a target CPU when they are being called.
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* See also the "Synchronization" section in microcode_core.c.
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*/
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enum ucode_state (*apply_microcode)(int cpu);
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int (*collect_cpu_info)(int cpu, struct cpu_signature *csig);
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void (*finalize_late_load)(int result);
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unsigned int nmi_safe : 1,
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use_nmi : 1;
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};
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struct early_load_data {
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u32 old_rev;
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u32 new_rev;
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};
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extern struct early_load_data early_data;
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extern struct ucode_cpu_info ucode_cpu_info[];
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struct cpio_data find_microcode_in_initrd(const char *path);
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#define MAX_UCODE_COUNT 128
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#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
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#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
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#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
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#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
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#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
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#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
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#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
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#define CPUID_IS(a, b, c, ebx, ecx, edx) \
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(!(((ebx) ^ (a)) | ((edx) ^ (b)) | ((ecx) ^ (c))))
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/*
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* In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
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* x86_cpuid_vendor() gets vendor id for BSP.
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*
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* In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
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* coding, we still use x86_cpuid_vendor() to get vendor id for AP.
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*
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* x86_cpuid_vendor() gets vendor information directly from CPUID.
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*/
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static inline int x86_cpuid_vendor(void)
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{
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u32 eax = 0x00000000;
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u32 ebx, ecx = 0, edx;
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native_cpuid(&eax, &ebx, &ecx, &edx);
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if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
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return X86_VENDOR_INTEL;
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if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
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return X86_VENDOR_AMD;
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return X86_VENDOR_UNKNOWN;
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}
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static inline unsigned int x86_cpuid_family(void)
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{
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u32 eax = 0x00000001;
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u32 ebx, ecx = 0, edx;
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native_cpuid(&eax, &ebx, &ecx, &edx);
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return x86_family(eax);
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}
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extern bool dis_ucode_ldr;
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extern bool force_minrev;
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#ifdef CONFIG_CPU_SUP_AMD
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void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family);
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void load_ucode_amd_ap(unsigned int family);
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int save_microcode_in_initrd_amd(unsigned int family);
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void reload_ucode_amd(unsigned int cpu);
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struct microcode_ops *init_amd_microcode(void);
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void exit_amd_microcode(void);
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#else /* CONFIG_CPU_SUP_AMD */
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static inline void load_ucode_amd_bsp(struct early_load_data *ed, unsigned int family) { }
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static inline void load_ucode_amd_ap(unsigned int family) { }
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static inline int save_microcode_in_initrd_amd(unsigned int family) { return -EINVAL; }
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static inline void reload_ucode_amd(unsigned int cpu) { }
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static inline struct microcode_ops *init_amd_microcode(void) { return NULL; }
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static inline void exit_amd_microcode(void) { }
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#endif /* !CONFIG_CPU_SUP_AMD */
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#ifdef CONFIG_CPU_SUP_INTEL
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void load_ucode_intel_bsp(struct early_load_data *ed);
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void load_ucode_intel_ap(void);
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void reload_ucode_intel(void);
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struct microcode_ops *init_intel_microcode(void);
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#else /* CONFIG_CPU_SUP_INTEL */
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static inline void load_ucode_intel_bsp(struct early_load_data *ed) { }
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static inline void load_ucode_intel_ap(void) { }
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static inline void reload_ucode_intel(void) { }
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static inline struct microcode_ops *init_intel_microcode(void) { return NULL; }
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#endif /* !CONFIG_CPU_SUP_INTEL */
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#endif /* _X86_MICROCODE_INTERNAL_H */
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