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linux/drivers/gpu/drm/msm/adreno
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Bjorn Andersson 3e6688fd96 drm/msm/adreno: Fix A680 chip id 
The only A680 referenced from DeviceTree is patch level 1, which since
commit '90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying
GPU")' isn't a known chip id.

Correct the chip id to allow the A680 to be recognized again.

Fixes: 90b593ce1c9e ("drm/msm/adreno: Switch to chip-id for identifying GPU")
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Patchwork: https://patchwork.freedesktop.org/patch/569839/
Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-12-10 10:22:45 -08:00
..
a2xx_gpu.c
drm/msm/a2xx: Call adreno_gpu_init() earlier
2023-08-07 14:39:24 -07:00
a2xx_gpu.h
drm/msm/a2xx: support loading legacy (iMX) firmware
2023-01-16 10:34:43 -08:00
a2xx.xml.h
drm/msm: Update generated headers
2023-03-21 09:10:47 -07:00
a3xx_gpu.c
drm/msm/a3xx: Implement .gpu_busy
2023-03-20 11:04:59 -07:00
a3xx_gpu.h
drm/msm/gpu: add ocmem init/cleanup functions
2019-10-07 08:17:39 -07:00
a3xx.xml.h
drm/msm: Update generated headers
2023-03-21 09:10:47 -07:00
a4xx_gpu.c
drm/msm/adreno: Switch to chip-id for identifying GPU
2023-08-07 14:22:36 -07:00
a4xx_gpu.h
drm/msm/gpu: add ocmem init/cleanup functions
2019-10-07 08:17:39 -07:00
a4xx.xml.h
drm/msm: Update generated headers
2023-03-21 09:10:47 -07:00
a5xx_debugfs.c
drm/msm: Remove unnecessary (void*) conversions
2023-06-04 05:23:39 +03:00
a5xx_gpu.c
drm/msm: Refactor UBWC config setting
2023-12-10 10:19:18 -08:00
a5xx_gpu.h
drm/msm: Allow a5xx to mark the RPTR shadow as privileged
2020-09-15 10:47:44 -07:00
a5xx_power.c
drm/msm/adreno: Switch to chip-id for identifying GPU
2023-08-07 14:22:36 -07:00
a5xx_preempt.c
drm/msm/a5xx: fix context faults during ring switch
2023-02-22 11:22:03 -08:00
a5xx.xml.h
drm/msm: Update generated headers
2023-03-21 09:10:47 -07:00
a6xx_gmu.c
drm/msm/a6xx: Fix up QMP handling
2023-10-16 07:29:42 -07:00
a6xx_gmu.h
drm/msm/a6xx: Send ACD state to QMP at GMU resume
2023-10-09 11:22:05 -07:00
a6xx_gmu.xml.h
drm/msm/a6xx: Add missing regs for A7XX
2023-10-09 11:22:05 -07:00
a6xx_gpu_state.c
drm/msm/a7xx: actually use a7xx state registers
2023-10-16 09:38:56 -07:00
a6xx_gpu_state.h
drm/msm/a7xx: actually use a7xx state registers
2023-10-16 09:38:56 -07:00
a6xx_gpu.c
drm/msm: Refactor UBWC config setting
2023-12-10 10:19:18 -08:00
a6xx_gpu.h
drm/msm/a6xx: Move LLC accessors to the common header
2023-08-17 10:09:53 -07:00
a6xx_hfi.c
drm/msm/a6xx: Add A740 support
2023-10-09 11:22:05 -07:00
a6xx_hfi.h
drm/msm/gpu: Also snapshot GMU HFI buffer
2021-11-29 16:19:58 -08:00
a6xx.xml.h
drm/msm/a6xx: Add missing regs for A7XX
2023-10-09 11:22:05 -07:00
adreno_common.xml.h
drm/msm: Update generated headers
2023-03-21 09:10:47 -07:00
adreno_device.c
drm/msm/adreno: Fix A680 chip id
2023-12-10 10:22:45 -08:00
adreno_gpu.c
drm/msm: Add param for the highest bank bit
2023-12-10 10:19:18 -08:00
adreno_gpu.h
drm/msm: Refactor UBWC config setting
2023-12-10 10:19:18 -08:00
adreno_pm4.xml.h
drm/msm: Update generated headers
2023-03-21 09:10:47 -07:00