There is a deadlock between the irq and fctx locks, the irq handling takes irq then fctx lock the fence signalling takes fctx then irq lock This splits the fence signalling path so the code that hits the irq lock is done in a separate work queue. This seems to fix crashes/hangs when using nouveau gsp with i915 primary GPU. Signed-off-by: Dave Airlie <airlied@redhat.com> Link: https://patchwork.freedesktop.org/patch/msgid/20231222043308.3090089-11-airlied@gmail.com
562 lines
14 KiB
C
562 lines
14 KiB
C
/*
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* Copyright (C) 2007 Ben Skeggs.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining
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* a copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sublicense, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial
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* portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
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* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
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* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/ktime.h>
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#include <linux/hrtimer.h>
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#include <linux/sched/signal.h>
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#include <trace/events/dma_fence.h>
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#include <nvif/if0020.h>
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#include "nouveau_drv.h"
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#include "nouveau_dma.h"
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#include "nouveau_fence.h"
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static const struct dma_fence_ops nouveau_fence_ops_uevent;
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static const struct dma_fence_ops nouveau_fence_ops_legacy;
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static inline struct nouveau_fence *
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from_fence(struct dma_fence *fence)
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{
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return container_of(fence, struct nouveau_fence, base);
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}
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static inline struct nouveau_fence_chan *
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nouveau_fctx(struct nouveau_fence *fence)
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{
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return container_of(fence->base.lock, struct nouveau_fence_chan, lock);
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}
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static int
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nouveau_fence_signal(struct nouveau_fence *fence)
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{
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int drop = 0;
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dma_fence_signal_locked(&fence->base);
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list_del(&fence->head);
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rcu_assign_pointer(fence->channel, NULL);
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if (test_bit(DMA_FENCE_FLAG_USER_BITS, &fence->base.flags)) {
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struct nouveau_fence_chan *fctx = nouveau_fctx(fence);
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if (atomic_dec_and_test(&fctx->notify_ref))
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drop = 1;
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}
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dma_fence_put(&fence->base);
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return drop;
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}
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static struct nouveau_fence *
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nouveau_local_fence(struct dma_fence *fence, struct nouveau_drm *drm)
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{
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if (fence->ops != &nouveau_fence_ops_legacy &&
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fence->ops != &nouveau_fence_ops_uevent)
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return NULL;
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return from_fence(fence);
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}
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void
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nouveau_fence_context_kill(struct nouveau_fence_chan *fctx, int error)
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{
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struct nouveau_fence *fence;
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unsigned long flags;
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spin_lock_irqsave(&fctx->lock, flags);
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while (!list_empty(&fctx->pending)) {
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fence = list_entry(fctx->pending.next, typeof(*fence), head);
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if (error)
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dma_fence_set_error(&fence->base, error);
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if (nouveau_fence_signal(fence))
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nvif_event_block(&fctx->event);
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}
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fctx->killed = 1;
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spin_unlock_irqrestore(&fctx->lock, flags);
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}
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void
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nouveau_fence_context_del(struct nouveau_fence_chan *fctx)
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{
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cancel_work_sync(&fctx->allow_block_work);
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nouveau_fence_context_kill(fctx, 0);
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nvif_event_dtor(&fctx->event);
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fctx->dead = 1;
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/*
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* Ensure that all accesses to fence->channel complete before freeing
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* the channel.
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*/
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synchronize_rcu();
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}
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static void
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nouveau_fence_context_put(struct kref *fence_ref)
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{
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kfree(container_of(fence_ref, struct nouveau_fence_chan, fence_ref));
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}
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void
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nouveau_fence_context_free(struct nouveau_fence_chan *fctx)
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{
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kref_put(&fctx->fence_ref, nouveau_fence_context_put);
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}
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static int
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nouveau_fence_update(struct nouveau_channel *chan, struct nouveau_fence_chan *fctx)
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{
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struct nouveau_fence *fence;
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int drop = 0;
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u32 seq = fctx->read(chan);
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while (!list_empty(&fctx->pending)) {
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fence = list_entry(fctx->pending.next, typeof(*fence), head);
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if ((int)(seq - fence->base.seqno) < 0)
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break;
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drop |= nouveau_fence_signal(fence);
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}
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return drop;
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}
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static int
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nouveau_fence_wait_uevent_handler(struct nvif_event *event, void *repv, u32 repc)
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{
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struct nouveau_fence_chan *fctx = container_of(event, typeof(*fctx), event);
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unsigned long flags;
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int ret = NVIF_EVENT_KEEP;
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spin_lock_irqsave(&fctx->lock, flags);
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if (!list_empty(&fctx->pending)) {
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struct nouveau_fence *fence;
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struct nouveau_channel *chan;
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fence = list_entry(fctx->pending.next, typeof(*fence), head);
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chan = rcu_dereference_protected(fence->channel, lockdep_is_held(&fctx->lock));
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if (nouveau_fence_update(chan, fctx))
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ret = NVIF_EVENT_DROP;
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}
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spin_unlock_irqrestore(&fctx->lock, flags);
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return ret;
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}
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static void
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nouveau_fence_work_allow_block(struct work_struct *work)
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{
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struct nouveau_fence_chan *fctx = container_of(work, struct nouveau_fence_chan,
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allow_block_work);
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if (atomic_read(&fctx->notify_ref) == 0)
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nvif_event_block(&fctx->event);
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else
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nvif_event_allow(&fctx->event);
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}
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void
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nouveau_fence_context_new(struct nouveau_channel *chan, struct nouveau_fence_chan *fctx)
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{
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struct nouveau_fence_priv *priv = (void*)chan->drm->fence;
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struct nouveau_cli *cli = (void *)chan->user.client;
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struct {
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struct nvif_event_v0 base;
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struct nvif_chan_event_v0 host;
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} args;
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int ret;
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INIT_WORK(&fctx->allow_block_work, nouveau_fence_work_allow_block);
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INIT_LIST_HEAD(&fctx->flip);
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INIT_LIST_HEAD(&fctx->pending);
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spin_lock_init(&fctx->lock);
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fctx->context = chan->drm->runl[chan->runlist].context_base + chan->chid;
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if (chan == chan->drm->cechan)
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strcpy(fctx->name, "copy engine channel");
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else if (chan == chan->drm->channel)
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strcpy(fctx->name, "generic kernel channel");
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else
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strcpy(fctx->name, nvxx_client(&cli->base)->name);
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kref_init(&fctx->fence_ref);
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if (!priv->uevent)
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return;
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args.host.version = 0;
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args.host.type = NVIF_CHAN_EVENT_V0_NON_STALL_INTR;
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ret = nvif_event_ctor(&chan->user, "fenceNonStallIntr", (chan->runlist << 16) | chan->chid,
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nouveau_fence_wait_uevent_handler, false,
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&args.base, sizeof(args), &fctx->event);
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WARN_ON(ret);
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}
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int
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nouveau_fence_emit(struct nouveau_fence *fence)
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{
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struct nouveau_channel *chan = unrcu_pointer(fence->channel);
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struct nouveau_fence_chan *fctx = chan->fence;
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struct nouveau_fence_priv *priv = (void*)chan->drm->fence;
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int ret;
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fence->timeout = jiffies + (15 * HZ);
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if (priv->uevent)
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dma_fence_init(&fence->base, &nouveau_fence_ops_uevent,
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&fctx->lock, fctx->context, ++fctx->sequence);
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else
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dma_fence_init(&fence->base, &nouveau_fence_ops_legacy,
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&fctx->lock, fctx->context, ++fctx->sequence);
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kref_get(&fctx->fence_ref);
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ret = fctx->emit(fence);
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if (!ret) {
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dma_fence_get(&fence->base);
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spin_lock_irq(&fctx->lock);
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if (unlikely(fctx->killed)) {
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spin_unlock_irq(&fctx->lock);
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dma_fence_put(&fence->base);
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return -ENODEV;
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}
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if (nouveau_fence_update(chan, fctx))
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nvif_event_block(&fctx->event);
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list_add_tail(&fence->head, &fctx->pending);
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spin_unlock_irq(&fctx->lock);
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}
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return ret;
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}
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bool
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nouveau_fence_done(struct nouveau_fence *fence)
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{
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if (fence->base.ops == &nouveau_fence_ops_legacy ||
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fence->base.ops == &nouveau_fence_ops_uevent) {
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struct nouveau_fence_chan *fctx = nouveau_fctx(fence);
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struct nouveau_channel *chan;
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unsigned long flags;
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if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->base.flags))
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return true;
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spin_lock_irqsave(&fctx->lock, flags);
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chan = rcu_dereference_protected(fence->channel, lockdep_is_held(&fctx->lock));
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if (chan && nouveau_fence_update(chan, fctx))
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nvif_event_block(&fctx->event);
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spin_unlock_irqrestore(&fctx->lock, flags);
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}
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return dma_fence_is_signaled(&fence->base);
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}
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static long
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nouveau_fence_wait_legacy(struct dma_fence *f, bool intr, long wait)
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{
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struct nouveau_fence *fence = from_fence(f);
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unsigned long sleep_time = NSEC_PER_MSEC / 1000;
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unsigned long t = jiffies, timeout = t + wait;
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while (!nouveau_fence_done(fence)) {
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ktime_t kt;
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t = jiffies;
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if (wait != MAX_SCHEDULE_TIMEOUT && time_after_eq(t, timeout)) {
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__set_current_state(TASK_RUNNING);
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return 0;
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}
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__set_current_state(intr ? TASK_INTERRUPTIBLE :
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TASK_UNINTERRUPTIBLE);
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kt = sleep_time;
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schedule_hrtimeout(&kt, HRTIMER_MODE_REL);
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sleep_time *= 2;
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if (sleep_time > NSEC_PER_MSEC)
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sleep_time = NSEC_PER_MSEC;
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if (intr && signal_pending(current))
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return -ERESTARTSYS;
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}
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__set_current_state(TASK_RUNNING);
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return timeout - t;
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}
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static int
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nouveau_fence_wait_busy(struct nouveau_fence *fence, bool intr)
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{
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int ret = 0;
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while (!nouveau_fence_done(fence)) {
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if (time_after_eq(jiffies, fence->timeout)) {
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ret = -EBUSY;
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break;
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}
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__set_current_state(intr ?
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TASK_INTERRUPTIBLE :
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TASK_UNINTERRUPTIBLE);
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if (intr && signal_pending(current)) {
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ret = -ERESTARTSYS;
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break;
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}
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}
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__set_current_state(TASK_RUNNING);
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return ret;
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}
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int
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nouveau_fence_wait(struct nouveau_fence *fence, bool lazy, bool intr)
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{
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long ret;
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if (!lazy)
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return nouveau_fence_wait_busy(fence, intr);
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ret = dma_fence_wait_timeout(&fence->base, intr, 15 * HZ);
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if (ret < 0)
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return ret;
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else if (!ret)
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return -EBUSY;
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else
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return 0;
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}
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int
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nouveau_fence_sync(struct nouveau_bo *nvbo, struct nouveau_channel *chan,
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bool exclusive, bool intr)
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{
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struct nouveau_fence_chan *fctx = chan->fence;
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struct dma_resv *resv = nvbo->bo.base.resv;
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int i, ret;
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ret = dma_resv_reserve_fences(resv, 1);
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if (ret)
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return ret;
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/* Waiting for the writes first causes performance regressions
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* under some circumstances. So manually wait for the reads first.
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*/
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for (i = 0; i < 2; ++i) {
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struct dma_resv_iter cursor;
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struct dma_fence *fence;
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dma_resv_for_each_fence(&cursor, resv,
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dma_resv_usage_rw(exclusive),
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fence) {
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enum dma_resv_usage usage;
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struct nouveau_fence *f;
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usage = dma_resv_iter_usage(&cursor);
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if (i == 0 && usage == DMA_RESV_USAGE_WRITE)
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continue;
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f = nouveau_local_fence(fence, chan->drm);
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if (f) {
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struct nouveau_channel *prev;
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bool must_wait = true;
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rcu_read_lock();
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prev = rcu_dereference(f->channel);
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if (prev && (prev == chan ||
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fctx->sync(f, prev, chan) == 0))
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must_wait = false;
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rcu_read_unlock();
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if (!must_wait)
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continue;
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}
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ret = dma_fence_wait(fence, intr);
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if (ret)
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return ret;
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}
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}
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return 0;
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}
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void
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nouveau_fence_unref(struct nouveau_fence **pfence)
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{
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if (*pfence)
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dma_fence_put(&(*pfence)->base);
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*pfence = NULL;
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}
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int
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nouveau_fence_create(struct nouveau_fence **pfence,
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struct nouveau_channel *chan)
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{
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struct nouveau_fence *fence;
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if (unlikely(!chan->fence))
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return -ENODEV;
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fence = kzalloc(sizeof(*fence), GFP_KERNEL);
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if (!fence)
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return -ENOMEM;
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fence->channel = chan;
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*pfence = fence;
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return 0;
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}
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int
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nouveau_fence_new(struct nouveau_fence **pfence,
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struct nouveau_channel *chan)
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{
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int ret = 0;
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ret = nouveau_fence_create(pfence, chan);
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if (ret)
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return ret;
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ret = nouveau_fence_emit(*pfence);
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if (ret)
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nouveau_fence_unref(pfence);
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return ret;
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}
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static const char *nouveau_fence_get_get_driver_name(struct dma_fence *fence)
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{
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return "nouveau";
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}
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static const char *nouveau_fence_get_timeline_name(struct dma_fence *f)
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{
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struct nouveau_fence *fence = from_fence(f);
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struct nouveau_fence_chan *fctx = nouveau_fctx(fence);
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return !fctx->dead ? fctx->name : "dead channel";
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}
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/*
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* In an ideal world, read would not assume the channel context is still alive.
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* This function may be called from another device, running into free memory as a
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* result. The drm node should still be there, so we can derive the index from
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* the fence context.
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*/
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static bool nouveau_fence_is_signaled(struct dma_fence *f)
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{
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struct nouveau_fence *fence = from_fence(f);
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struct nouveau_fence_chan *fctx = nouveau_fctx(fence);
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struct nouveau_channel *chan;
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bool ret = false;
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rcu_read_lock();
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chan = rcu_dereference(fence->channel);
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if (chan)
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ret = (int)(fctx->read(chan) - fence->base.seqno) >= 0;
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rcu_read_unlock();
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return ret;
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}
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static bool nouveau_fence_no_signaling(struct dma_fence *f)
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{
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struct nouveau_fence *fence = from_fence(f);
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/*
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* caller should have a reference on the fence,
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* else fence could get freed here
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*/
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WARN_ON(kref_read(&fence->base.refcount) <= 1);
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/*
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* This needs uevents to work correctly, but dma_fence_add_callback relies on
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* being able to enable signaling. It will still get signaled eventually,
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* just not right away.
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*/
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if (nouveau_fence_is_signaled(f)) {
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list_del(&fence->head);
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dma_fence_put(&fence->base);
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return false;
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}
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return true;
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}
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static void nouveau_fence_release(struct dma_fence *f)
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{
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struct nouveau_fence *fence = from_fence(f);
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struct nouveau_fence_chan *fctx = nouveau_fctx(fence);
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kref_put(&fctx->fence_ref, nouveau_fence_context_put);
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dma_fence_free(&fence->base);
|
|
}
|
|
|
|
static const struct dma_fence_ops nouveau_fence_ops_legacy = {
|
|
.get_driver_name = nouveau_fence_get_get_driver_name,
|
|
.get_timeline_name = nouveau_fence_get_timeline_name,
|
|
.enable_signaling = nouveau_fence_no_signaling,
|
|
.signaled = nouveau_fence_is_signaled,
|
|
.wait = nouveau_fence_wait_legacy,
|
|
.release = nouveau_fence_release
|
|
};
|
|
|
|
static bool nouveau_fence_enable_signaling(struct dma_fence *f)
|
|
{
|
|
struct nouveau_fence *fence = from_fence(f);
|
|
struct nouveau_fence_chan *fctx = nouveau_fctx(fence);
|
|
bool ret;
|
|
bool do_work;
|
|
|
|
if (atomic_inc_return(&fctx->notify_ref) == 0)
|
|
do_work = true;
|
|
|
|
ret = nouveau_fence_no_signaling(f);
|
|
if (ret)
|
|
set_bit(DMA_FENCE_FLAG_USER_BITS, &fence->base.flags);
|
|
else if (atomic_dec_and_test(&fctx->notify_ref))
|
|
do_work = true;
|
|
|
|
if (do_work)
|
|
schedule_work(&fctx->allow_block_work);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct dma_fence_ops nouveau_fence_ops_uevent = {
|
|
.get_driver_name = nouveau_fence_get_get_driver_name,
|
|
.get_timeline_name = nouveau_fence_get_timeline_name,
|
|
.enable_signaling = nouveau_fence_enable_signaling,
|
|
.signaled = nouveau_fence_is_signaled,
|
|
.release = nouveau_fence_release
|
|
};
|