7ebfe10ec3
The kernel robot using sparse is complaining like this:
drivers/pinctrl/pinctrl-loongson2.c:212:21: sparse:
sparse: incorrect type in argument 1 (different address spaces) @@
expected void const volatile [noderef] __iomem *addr @@
got void *[noderef] __iomem reg @@
(...)
I think the problem is simply that the register base is defined
as void * __iomem instead of void __iomem * and this is because
of the way const correctness works with pointer infix order.
Fix it up. I think.
Reported-by: kernel test robot <lkp@intel.com>
Cc: zhanghongchen <zhanghongchen@loongson.cn>
Cc: Yinbo Zhu <zhuyinbo@loongson.cn>
Fixes: f73f88acbc ("pinctrl: pinctrl-loongson2: add pinctrl driver support")
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
312 lines
8.7 KiB
C
312 lines
8.7 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Author: zhanghongchen <zhanghongchen@loongson.cn>
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* Yinbo Zhu <zhuyinbo@loongson.cn>
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* Copyright (C) 2022-2023 Loongson Technology Corporation Limited
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/mod_devicetable.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/bitops.h>
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#include <linux/io.h>
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#include <linux/seq_file.h>
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#include "core.h"
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#include "pinctrl-utils.h"
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#define PMX_GROUP(name, offset, bitv) \
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{ \
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.grp = PINCTRL_PINGROUP((#name), (name ## _pins), \
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ARRAY_SIZE((name ## _pins))), \
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.reg = offset, \
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.bit = bitv, \
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}
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#define SPECIFIC_GROUP(group) \
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static const char * const group##_groups[] = { \
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#group \
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}
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#define FUNCTION(fn) \
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{ \
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.name = #fn, \
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.groups = fn ## _groups, \
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.num_groups = ARRAY_SIZE(fn ## _groups), \
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}
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struct loongson2_pinctrl {
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struct device *dev;
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struct pinctrl_dev *pcdev;
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struct pinctrl_desc desc;
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struct device_node *of_node;
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spinlock_t lock;
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void __iomem *reg_base;
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};
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struct loongson2_pmx_group {
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struct pingroup grp;
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unsigned int reg;
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unsigned int bit;
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};
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struct loongson2_pmx_func {
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const char *name;
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const char * const *groups;
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unsigned int num_groups;
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};
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#define LOONGSON2_PIN(x) PINCTRL_PIN(x, "gpio"#x)
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static const struct pinctrl_pin_desc loongson2_pctrl_pins[] = {
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LOONGSON2_PIN(0), LOONGSON2_PIN(1), LOONGSON2_PIN(2), LOONGSON2_PIN(3),
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LOONGSON2_PIN(4), LOONGSON2_PIN(5), LOONGSON2_PIN(6), LOONGSON2_PIN(7),
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LOONGSON2_PIN(8), LOONGSON2_PIN(9), LOONGSON2_PIN(10), LOONGSON2_PIN(11),
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LOONGSON2_PIN(12), LOONGSON2_PIN(13), LOONGSON2_PIN(14),
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LOONGSON2_PIN(16), LOONGSON2_PIN(17), LOONGSON2_PIN(18), LOONGSON2_PIN(19),
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LOONGSON2_PIN(20), LOONGSON2_PIN(21), LOONGSON2_PIN(22), LOONGSON2_PIN(23),
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LOONGSON2_PIN(24), LOONGSON2_PIN(25), LOONGSON2_PIN(26), LOONGSON2_PIN(27),
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LOONGSON2_PIN(28), LOONGSON2_PIN(29), LOONGSON2_PIN(30),
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LOONGSON2_PIN(32), LOONGSON2_PIN(33), LOONGSON2_PIN(34), LOONGSON2_PIN(35),
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LOONGSON2_PIN(36), LOONGSON2_PIN(37), LOONGSON2_PIN(38), LOONGSON2_PIN(39),
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LOONGSON2_PIN(40), LOONGSON2_PIN(41),
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LOONGSON2_PIN(44), LOONGSON2_PIN(45), LOONGSON2_PIN(46), LOONGSON2_PIN(47),
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LOONGSON2_PIN(48), LOONGSON2_PIN(49), LOONGSON2_PIN(50), LOONGSON2_PIN(51),
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LOONGSON2_PIN(52), LOONGSON2_PIN(53), LOONGSON2_PIN(54), LOONGSON2_PIN(55),
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LOONGSON2_PIN(56), LOONGSON2_PIN(57), LOONGSON2_PIN(58), LOONGSON2_PIN(59),
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LOONGSON2_PIN(60), LOONGSON2_PIN(61), LOONGSON2_PIN(62), LOONGSON2_PIN(63),
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};
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static const unsigned int gpio_pins[] = {0, 1, 2, 3, 4, 5, 6, 7,
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8, 9, 10, 11, 12, 13, 14,
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16, 17, 18, 19, 20, 21, 22, 23,
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24, 25, 26, 27, 28, 29, 30,
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32, 33, 34, 35, 36, 37, 38, 39,
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40, 43, 44, 45, 46, 47,
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48, 49, 50, 51, 52, 53, 46, 55,
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56, 57, 58, 59, 60, 61, 62, 63};
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static const unsigned int sdio_pins[] = {36, 37, 38, 39, 40, 41};
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static const unsigned int can1_pins[] = {34, 35};
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static const unsigned int can0_pins[] = {32, 33};
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static const unsigned int pwm3_pins[] = {23};
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static const unsigned int pwm2_pins[] = {22};
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static const unsigned int pwm1_pins[] = {21};
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static const unsigned int pwm0_pins[] = {20};
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static const unsigned int i2c1_pins[] = {18, 19};
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static const unsigned int i2c0_pins[] = {16, 17};
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static const unsigned int nand_pins[] = {44, 45, 46, 47, 48, 49, 50, 51,
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52, 53, 54, 55, 56, 57, 58, 59, 60,
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61, 62, 63};
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static const unsigned int sata_led_pins[] = {14};
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static const unsigned int i2s_pins[] = {24, 25, 26, 27, 28};
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static const unsigned int hda_pins[] = {24, 25, 26, 27, 28, 29, 30};
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static struct loongson2_pmx_group loongson2_pmx_groups[] = {
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PMX_GROUP(gpio, 0x0, 64),
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PMX_GROUP(sdio, 0x0, 20),
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PMX_GROUP(can1, 0x0, 17),
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PMX_GROUP(can0, 0x0, 16),
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PMX_GROUP(pwm3, 0x0, 15),
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PMX_GROUP(pwm2, 0x0, 14),
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PMX_GROUP(pwm1, 0x0, 13),
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PMX_GROUP(pwm0, 0x0, 12),
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PMX_GROUP(i2c1, 0x0, 11),
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PMX_GROUP(i2c0, 0x0, 10),
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PMX_GROUP(nand, 0x0, 9),
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PMX_GROUP(sata_led, 0x0, 8),
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PMX_GROUP(i2s, 0x0, 6),
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PMX_GROUP(hda, 0x0, 4),
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};
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SPECIFIC_GROUP(sdio);
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SPECIFIC_GROUP(can1);
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SPECIFIC_GROUP(can0);
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SPECIFIC_GROUP(pwm3);
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SPECIFIC_GROUP(pwm2);
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SPECIFIC_GROUP(pwm1);
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SPECIFIC_GROUP(pwm0);
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SPECIFIC_GROUP(i2c1);
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SPECIFIC_GROUP(i2c0);
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SPECIFIC_GROUP(nand);
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SPECIFIC_GROUP(sata_led);
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SPECIFIC_GROUP(i2s);
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SPECIFIC_GROUP(hda);
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static const char * const gpio_groups[] = {
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"sdio",
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"can1", "can0",
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"pwm3", "pwm2", "pwm1", "pwm0",
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"i2c1", "i2c0",
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"nand",
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"sata_led",
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"i2s",
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"hda",
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};
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static const struct loongson2_pmx_func loongson2_pmx_functions[] = {
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FUNCTION(gpio),
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FUNCTION(sdio),
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FUNCTION(can1),
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FUNCTION(can0),
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FUNCTION(pwm3),
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FUNCTION(pwm2),
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FUNCTION(pwm1),
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FUNCTION(pwm0),
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FUNCTION(i2c1),
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FUNCTION(i2c0),
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FUNCTION(nand),
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FUNCTION(sata_led),
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FUNCTION(i2s),
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FUNCTION(hda),
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};
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static int loongson2_get_groups_count(struct pinctrl_dev *pcdev)
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{
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return ARRAY_SIZE(loongson2_pmx_groups);
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}
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static const char *loongson2_get_group_name(struct pinctrl_dev *pcdev,
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unsigned int selector)
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{
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return loongson2_pmx_groups[selector].grp.name;
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}
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static int loongson2_get_group_pins(struct pinctrl_dev *pcdev, unsigned int selector,
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const unsigned int **pins, unsigned int *num_pins)
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{
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*pins = loongson2_pmx_groups[selector].grp.pins;
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*num_pins = loongson2_pmx_groups[selector].grp.npins;
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return 0;
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}
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static void loongson2_pin_dbg_show(struct pinctrl_dev *pcdev, struct seq_file *s,
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unsigned int offset)
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{
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seq_printf(s, " %s", dev_name(pcdev->dev));
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}
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static const struct pinctrl_ops loongson2_pctrl_ops = {
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.get_groups_count = loongson2_get_groups_count,
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.get_group_name = loongson2_get_group_name,
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.get_group_pins = loongson2_get_group_pins,
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.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
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.dt_free_map = pinctrl_utils_free_map,
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.pin_dbg_show = loongson2_pin_dbg_show,
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};
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static int loongson2_pmx_set_mux(struct pinctrl_dev *pcdev, unsigned int func_num,
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unsigned int group_num)
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{
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struct loongson2_pinctrl *pctrl = pinctrl_dev_get_drvdata(pcdev);
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void __iomem *reg = pctrl->reg_base +
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loongson2_pmx_groups[group_num].reg;
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unsigned int mux_bit = loongson2_pmx_groups[group_num].bit;
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unsigned int val;
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unsigned long flags;
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spin_lock_irqsave(&pctrl->lock, flags);
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val = readl(reg);
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if (func_num == 0)
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val &= ~BIT(mux_bit);
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else
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val |= BIT(mux_bit);
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writel(val, reg);
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spin_unlock_irqrestore(&pctrl->lock, flags);
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return 0;
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}
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static int loongson2_pmx_get_funcs_count(struct pinctrl_dev *pcdev)
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{
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return ARRAY_SIZE(loongson2_pmx_functions);
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}
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static const char *loongson2_pmx_get_func_name(struct pinctrl_dev *pcdev,
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unsigned int selector)
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{
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return loongson2_pmx_functions[selector].name;
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}
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static int loongson2_pmx_get_groups(struct pinctrl_dev *pcdev,
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unsigned int selector,
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const char * const **groups,
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unsigned int * const num_groups)
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{
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*groups = loongson2_pmx_functions[selector].groups;
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*num_groups = loongson2_pmx_functions[selector].num_groups;
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return 0;
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}
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static const struct pinmux_ops loongson2_pmx_ops = {
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.set_mux = loongson2_pmx_set_mux,
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.get_functions_count = loongson2_pmx_get_funcs_count,
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.get_function_name = loongson2_pmx_get_func_name,
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.get_function_groups = loongson2_pmx_get_groups,
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};
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static int loongson2_pinctrl_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct loongson2_pinctrl *pctrl;
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pctrl = devm_kzalloc(dev, sizeof(*pctrl), GFP_KERNEL);
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if (!pctrl)
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return -ENOMEM;
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pctrl->reg_base = devm_platform_ioremap_resource(pdev, 0);
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if (IS_ERR(pctrl->reg_base))
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return PTR_ERR(pctrl->reg_base);
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spin_lock_init(&pctrl->lock);
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pctrl->dev = dev;
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pctrl->desc.name = "pinctrl-loongson2";
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pctrl->desc.owner = THIS_MODULE;
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pctrl->desc.pctlops = &loongson2_pctrl_ops;
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pctrl->desc.pmxops = &loongson2_pmx_ops;
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pctrl->desc.pins = loongson2_pctrl_pins;
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pctrl->desc.npins = ARRAY_SIZE(loongson2_pctrl_pins);
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pctrl->pcdev = devm_pinctrl_register(pctrl->dev, &pctrl->desc, pctrl);
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if (IS_ERR(pctrl->pcdev))
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return dev_err_probe(pctrl->dev, PTR_ERR(pctrl->pcdev),
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"can't register pinctrl device");
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return 0;
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}
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static const struct of_device_id loongson2_pinctrl_dt_match[] = {
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{
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.compatible = "loongson,ls2k-pinctrl",
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},
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{ }
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};
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static struct platform_driver loongson2_pinctrl_driver = {
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.probe = loongson2_pinctrl_probe,
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.driver = {
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.name = "loongson2-pinctrl",
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.of_match_table = loongson2_pinctrl_dt_match,
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},
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};
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static int __init loongson2_pinctrl_init(void)
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{
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return platform_driver_register(&loongson2_pinctrl_driver);
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}
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arch_initcall(loongson2_pinctrl_init);
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static void __exit loongson2_pinctrl_exit(void)
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{
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platform_driver_unregister(&loongson2_pinctrl_driver);
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}
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module_exit(loongson2_pinctrl_exit);
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MODULE_DESCRIPTION("Loongson2 Pinctrl driver");
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MODULE_LICENSE("GPL");
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