6466ec14aa
XMM registers can be collected on Icelake and later platforms.
Add specific arch__intr_reg_mask(), which creating an event to check if
the kernel and hardware can collect XMM registers.
Test on Skylake which doesn't support XMM registers collection. There is
nothing changed.
#perf record -I?
available registers: AX BX CX DX SI DI BP SP IP FLAGS CS SS R8 R9
R10 R11 R12 R13 R14 R15
Usage: perf record [<options>] [<command>]
or: perf record [<options>] -- <command> [<options>]
-I, --intr-regs[=<any register>]
sample selected machine registers on
interrupt, use '-I?' to list register names
#perf record -I
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.905 MB perf.data (2520 samples) ]
#perf evlist -v
cycles: size: 112, { sample_period, sample_freq }: 4000, sample_type:
IP|TID|TIME|CPU|PERIOD|REGS_INTR, read_format: ID, disabled: 1,
inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3,
sample_id_all: 1, exclude_guest: 1, mmap2: 1, comm_exec: 1, ksymbol:
1, bpf_event: 1, sample_regs_intr: 0xff0fff
Test on Icelake which support XMM registers collection.
#perf record -I?
available registers: AX BX CX DX SI DI BP SP IP FLAGS CS SS R8 R9 R10
R11 R12 R13 R14 R15 XMM0 XMM1 XMM2 XMM3 XMM4 XMM5 XMM6 XMM7 XMM8 XMM9
XMM10 XMM11 XMM12 XMM13 XMM14 XMM15
Usage: perf record [<options>] [<command>]
or: perf record [<options>] -- <command> [<options>]
-I, --intr-regs[=<any register>]
sample selected machine registers on
interrupt, use '-I?' to list register names
#perf record -I
[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 0.800 MB perf.data (318 samples) ]
#perf evlist -v
cycles: size: 112, { sample_period, sample_freq }: 4000, sample_type:
IP|TID|TIME|CPU|PERIOD|REGS_INTR, read_format: ID, disabled: 1,
inherit: 1, mmap: 1, comm: 1, freq: 1, task: 1, precise_ip: 3,
sample_id_all: 1, exclude_guest: 1, mmap2: 1, comm_exec: 1, ksymbol:
1, bpf_event: 1, sample_regs_intr: 0xffffffff00ff0fff
Committer notes:
Don't set attr.sample_period as a named struct init, as it is part of an
unnamed union in 'struct perf_event_attr', and doing so breaks the build
on older gcc versions, such as:
gcc version 4.1.2 20080704 (Red Hat 4.1.2-55)
gcc version 4.4.7 20120313 (Red Hat 4.4.7-23) (GCC)
arch/x86/util/perf_regs.c: In function 'arch__intr_reg_mask':
arch/x86/util/perf_regs.c:279: error: unknown field 'sample_period' specified in initializer
cc1: warnings being treated as errors
arch/x86/util/perf_regs.c:279: warning: missing braces around initializer
arch/x86/util/perf_regs.c:279: warning: (near initialization for 'attr.<anonymous>')
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
[ Only on a lenovo t480s, a skylake machine, where the XMM registers didn't show up in -I?/--user-regs=? as expected ]
Tested-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Cc: Andi Kleen <ak@linux.intel.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Link: http://lkml.kernel.org/r/1557865174-56264-3-git-send-email-kan.liang@linux.intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
110 lines
2.2 KiB
C
110 lines
2.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef ARCH_PERF_REGS_H
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#define ARCH_PERF_REGS_H
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#include <stdlib.h>
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#include <linux/types.h>
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#include <asm/perf_regs.h>
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void perf_regs_load(u64 *regs);
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#define PERF_REGS_MAX PERF_REG_X86_XMM_MAX
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#define PERF_XMM_REGS_MASK (~((1ULL << PERF_REG_X86_XMM0) - 1))
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#ifndef HAVE_ARCH_X86_64_SUPPORT
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#define PERF_REGS_MASK ((1ULL << PERF_REG_X86_32_MAX) - 1)
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#define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_32
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#else
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#define REG_NOSUPPORT ((1ULL << PERF_REG_X86_DS) | \
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(1ULL << PERF_REG_X86_ES) | \
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(1ULL << PERF_REG_X86_FS) | \
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(1ULL << PERF_REG_X86_GS))
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#define PERF_REGS_MASK (((1ULL << PERF_REG_X86_64_MAX) - 1) & ~REG_NOSUPPORT)
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#define PERF_SAMPLE_REGS_ABI PERF_SAMPLE_REGS_ABI_64
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#endif
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#define PERF_REG_IP PERF_REG_X86_IP
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#define PERF_REG_SP PERF_REG_X86_SP
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static inline const char *perf_reg_name(int id)
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{
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switch (id) {
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case PERF_REG_X86_AX:
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return "AX";
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case PERF_REG_X86_BX:
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return "BX";
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case PERF_REG_X86_CX:
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return "CX";
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case PERF_REG_X86_DX:
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return "DX";
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case PERF_REG_X86_SI:
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return "SI";
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case PERF_REG_X86_DI:
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return "DI";
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case PERF_REG_X86_BP:
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return "BP";
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case PERF_REG_X86_SP:
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return "SP";
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case PERF_REG_X86_IP:
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return "IP";
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case PERF_REG_X86_FLAGS:
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return "FLAGS";
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case PERF_REG_X86_CS:
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return "CS";
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case PERF_REG_X86_SS:
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return "SS";
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case PERF_REG_X86_DS:
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return "DS";
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case PERF_REG_X86_ES:
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return "ES";
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case PERF_REG_X86_FS:
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return "FS";
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case PERF_REG_X86_GS:
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return "GS";
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#ifdef HAVE_ARCH_X86_64_SUPPORT
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case PERF_REG_X86_R8:
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return "R8";
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case PERF_REG_X86_R9:
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return "R9";
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case PERF_REG_X86_R10:
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return "R10";
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case PERF_REG_X86_R11:
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return "R11";
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case PERF_REG_X86_R12:
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return "R12";
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case PERF_REG_X86_R13:
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return "R13";
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case PERF_REG_X86_R14:
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return "R14";
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case PERF_REG_X86_R15:
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return "R15";
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#endif /* HAVE_ARCH_X86_64_SUPPORT */
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#define XMM(x) \
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case PERF_REG_X86_XMM ## x: \
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case PERF_REG_X86_XMM ## x + 1: \
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return "XMM" #x;
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XMM(0)
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XMM(1)
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XMM(2)
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XMM(3)
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XMM(4)
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XMM(5)
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XMM(6)
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XMM(7)
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XMM(8)
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XMM(9)
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XMM(10)
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XMM(11)
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XMM(12)
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XMM(13)
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XMM(14)
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XMM(15)
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#undef XMM
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default:
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return NULL;
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}
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return NULL;
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}
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#endif /* ARCH_PERF_REGS_H */
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