Biju Das
a1bcf50a99
clk: renesas: rzg2l-cpg: Add support for RZ/V2L SoC
The clock structure for RZ/V2L is almost identical to the RZ/G2L SoC. The only difference being that RZ/V2L has additional registers to control clocks and resets for the DRP-AI block. Reuse r9a07g044-cpg.c, as the clock IDs and reset IDs are the same between RZ/G2L and RZ/V2L, and add a separate r9a07g054_cpg_info to take care of the DRP-AI clocks/resets. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220205084006.7142-1-biju.das.jz@bp.renesas.com Link: https://lore.kernel.org/r/20220209203411.22332-1-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Linux kernel ============ There are several guides for kernel developers and users. These guides can be rendered in a number of formats, like HTML and PDF. Please read Documentation/admin-guide/README.rst first. In order to build the documentation, use ``make htmldocs`` or ``make pdfdocs``. The formatted documentation can also be read online at: https://www.kernel.org/doc/html/latest/ There are various text files in the Documentation/ subdirectory, several of them using the Restructured Text markup notation. Please read the Documentation/process/changes.rst file, as it contains the requirements for building and running the kernel, and information about the problems which may result by upgrading your kernel.
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