9d56dd3b08
The old ctrl in/out routines are non-portable and unsuitable for cross-platform use. While drivers/sh has already been sanitized, there is still quite a lot of code that is not. This converts the arch/sh/ bits over, which permits us to flag the routines as deprecated whilst still building with -Werror for the architecture code, and to ensure that future users are not added. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
68 lines
1.9 KiB
C
68 lines
1.9 KiB
C
/*
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* include/asm-sh/magicpanelr2.h
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*
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* Copyright (C) 2007 Markus Brunner, Mark Jonas
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*
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* I/O addresses and bitmasks for Magic Panel Release 2 board
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __ASM_SH_MAGICPANELR2_H
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#define __ASM_SH_MAGICPANELR2_H
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#include <asm/gpio.h>
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#define __IO_PREFIX mpr2
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#include <asm/io_generic.h>
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#define SETBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) | mask, reg)
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#define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg)
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#define SETBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) | mask, reg)
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#define CLRBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) & ~mask, reg)
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#define CLRBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) & ~mask, reg)
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#define CLRBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) & ~mask, reg)
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#define PA_LED PORT_PADR /* LED */
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/* BSC */
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#define CMNCR 0xA4FD0000UL
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#define CS0BCR 0xA4FD0004UL
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#define CS2BCR 0xA4FD0008UL
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#define CS3BCR 0xA4FD000CUL
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#define CS4BCR 0xA4FD0010UL
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#define CS5ABCR 0xA4FD0014UL
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#define CS5BBCR 0xA4FD0018UL
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#define CS6ABCR 0xA4FD001CUL
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#define CS6BBCR 0xA4FD0020UL
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#define CS0WCR 0xA4FD0024UL
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#define CS2WCR 0xA4FD0028UL
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#define CS3WCR 0xA4FD002CUL
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#define CS4WCR 0xA4FD0030UL
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#define CS5AWCR 0xA4FD0034UL
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#define CS5BWCR 0xA4FD0038UL
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#define CS6AWCR 0xA4FD003CUL
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#define CS6BWCR 0xA4FD0040UL
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/* usb */
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#define PORT_UTRCTL 0xA405012CUL
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#define PORT_UCLKCR_W 0xA40A0008UL
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#define INTC_ICR0 0xA414FEE0UL
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#define INTC_ICR1 0xA4140010UL
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#define INTC_ICR2 0xA4140012UL
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/* MTD */
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#define MPR2_MTD_BOOTLOADER_SIZE 0x00060000UL
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#define MPR2_MTD_KERNEL_SIZE 0x00200000UL
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#endif /* __ASM_SH_MAGICPANELR2_H */
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