579f8983c4
Write the devicetree binding text file associated with the Mellanox BlueField I2C controller in schema file, JSON compatible subset of YAML. Besides, add an entry within MAINTAINERS file. Signed-off-by: Khalil Blaiech <kblaiech@nvidia.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
79 lines
1.6 KiB
YAML
79 lines
1.6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/i2c/mellanox,i2c-mlxbf.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Mellanox I2C SMBus on BlueField SoCs
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maintainers:
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- Khalil Blaiech <kblaiech@nvidia.com>
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allOf:
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- $ref: /schemas/i2c/i2c-controller.yaml#
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properties:
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compatible:
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enum:
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- mellanox,i2c-mlxbf1
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- mellanox,i2c-mlxbf2
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reg:
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minItems: 3
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maxItems: 4
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items:
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- description: Smbus block registers
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- description: Cause master registers
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- description: Cause slave registers
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- description: Cause coalesce registers
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interrupts:
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maxItems: 1
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clock-frequency:
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enum: [ 100000, 400000, 1000000 ]
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description:
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bus frequency used to configure timing registers;
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The frequency is expressed in Hz. Default is 100000.
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required:
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- compatible
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- reg
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- interrupts
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unevaluatedProperties: false
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if:
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properties:
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compatible:
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contains:
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enum:
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- mellanox,i2c-mlxbf1
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then:
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properties:
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reg:
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maxItems: 3
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examples:
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- |
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i2c@2804000 {
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compatible = "mellanox,i2c-mlxbf1";
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reg = <0x02804000 0x800>,
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<0x02801200 0x020>,
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<0x02801260 0x020>;
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interrupts = <57>;
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clock-frequency = <100000>;
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};
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- |
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i2c@2808800 {
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compatible = "mellanox,i2c-mlxbf2";
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reg = <0x02808800 0x600>,
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<0x02808e00 0x020>,
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<0x02808e20 0x020>,
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<0x02808e40 0x010>;
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interrupts = <57>;
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clock-frequency = <400000>;
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};
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