linux/drivers/clk/socfpga
Stephen Boyd a30a67be7b clk: socfpga: Don't have get_parent for single parent ops
This driver creates a gate clk with the possibility to have multiple
parents. That can cause problems if the common clk framework tries to
call the get_parent() op and gets back a number that's larger than the
number of parents the clk says it supports in
clk_init_data::num_parents. Let's duplicate the clk_ops structure each
time this function is called and drop the get/set parent ops when there
is only one parent. This allows the framework to consider a number
larger than clk_init_data::num_parents as an error condition of the
get_parent() clk op, clearing the way for proper code.

Cc: Jerome Brunet <jbrunet@baylibre.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Tested-by: Dinh Nguyen <dinguyen@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-01-24 11:36:25 -08:00
..
clk-gate-a10.c clk: socfpga: Fix the smplsel on Arria10 and Stratix10 2017-06-19 17:01:55 -07:00
clk-gate-s10.c clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
clk-gate.c clk: socfpga: Don't have get_parent for single parent ops 2019-01-24 11:36:25 -08:00
clk-periph-a10.c clk: socfpga: allow for multiple parents on Arria10 periph clocks 2016-02-22 14:17:37 -08:00
clk-periph-s10.c clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
clk-periph.c clk: socfpga: Add a second parent option for the dbg_base_clk 2015-08-24 16:49:03 -07:00
clk-pll-a10.c clk: socfpga: fix __init annotation 2016-02-08 14:13:31 -08:00
clk-pll-s10.c clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
clk-pll.c clk: socfpga: Remove clk.h and clkdev.h includes 2015-07-20 11:11:14 -07:00
clk-s10.c clk: socfpga: stratix10: fix the sdmmc_free_clk mux 2018-07-06 11:08:02 -07:00
clk.c clk: socfpga: add a clock driver for the Arria 10 platform 2015-05-21 15:16:04 -07:00
clk.h clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
Makefile clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00
stratix10-clk.h clk: socfpga: stratix10: add clock driver for Stratix10 platform 2018-04-06 10:12:35 -07:00