152d32aa84
- Stage-2 isolation for the host kernel when running in protected mode - Guest SVE support when running in nVHE mode - Force W^X hypervisor mappings in nVHE mode - ITS save/restore for guests using direct injection with GICv4.1 - nVHE panics now produce readable backtraces - Guest support for PTP using the ptp_kvm driver - Performance improvements in the S2 fault handler x86: - Optimizations and cleanup of nested SVM code - AMD: Support for virtual SPEC_CTRL - Optimizations of the new MMU code: fast invalidation, zap under read lock, enable/disably dirty page logging under read lock - /dev/kvm API for AMD SEV live migration (guest API coming soon) - support SEV virtual machines sharing the same encryption context - support SGX in virtual machines - add a few more statistics - improved directed yield heuristics - Lots and lots of cleanups Generic: - Rework of MMU notifier interface, simplifying and optimizing the architecture-specific code - Some selftests improvements -----BEGIN PGP SIGNATURE----- iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmCJ13kUHHBib256aW5p QHJlZGhhdC5jb20ACgkQv/vSX3jHroM1HAgAqzPxEtiTPTFeFJV5cnPPJ3dFoFDK y/juZJUQ1AOtvuWzzwuf175ewkv9vfmtG6rVohpNSkUlJYeoc6tw7n8BTTzCVC1b c/4Dnrjeycr6cskYlzaPyV6MSgjSv5gfyj1LA5UEM16LDyekmaynosVWY5wJhju+ Bnyid8l8Utgz+TLLYogfQJQECCrsU0Wm//n+8TWQgLf1uuiwshU5JJe7b43diJrY +2DX+8p9yWXCTz62sCeDWNahUv8AbXpMeJ8uqZPYcN1P0gSEUGu8xKmLOFf9kR7b M4U1Gyz8QQbjd2lqnwiWIkvRLX6gyGVbq2zH0QbhUe5gg3qGUX7JjrhdDQ== =AXUi -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull kvm updates from Paolo Bonzini: "This is a large update by KVM standards, including AMD PSP (Platform Security Processor, aka "AMD Secure Technology") and ARM CoreSight (debug and trace) changes. ARM: - CoreSight: Add support for ETE and TRBE - Stage-2 isolation for the host kernel when running in protected mode - Guest SVE support when running in nVHE mode - Force W^X hypervisor mappings in nVHE mode - ITS save/restore for guests using direct injection with GICv4.1 - nVHE panics now produce readable backtraces - Guest support for PTP using the ptp_kvm driver - Performance improvements in the S2 fault handler x86: - AMD PSP driver changes - Optimizations and cleanup of nested SVM code - AMD: Support for virtual SPEC_CTRL - Optimizations of the new MMU code: fast invalidation, zap under read lock, enable/disably dirty page logging under read lock - /dev/kvm API for AMD SEV live migration (guest API coming soon) - support SEV virtual machines sharing the same encryption context - support SGX in virtual machines - add a few more statistics - improved directed yield heuristics - Lots and lots of cleanups Generic: - Rework of MMU notifier interface, simplifying and optimizing the architecture-specific code - a handful of "Get rid of oprofile leftovers" patches - Some selftests improvements" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (379 commits) KVM: selftests: Speed up set_memory_region_test selftests: kvm: Fix the check of return value KVM: x86: Take advantage of kvm_arch_dy_has_pending_interrupt() KVM: SVM: Skip SEV cache flush if no ASIDs have been used KVM: SVM: Remove an unnecessary prototype declaration of sev_flush_asids() KVM: SVM: Drop redundant svm_sev_enabled() helper KVM: SVM: Move SEV VMCB tracking allocation to sev.c KVM: SVM: Explicitly check max SEV ASID during sev_hardware_setup() KVM: SVM: Unconditionally invoke sev_hardware_teardown() KVM: SVM: Enable SEV/SEV-ES functionality by default (when supported) KVM: SVM: Condition sev_enabled and sev_es_enabled on CONFIG_KVM_AMD_SEV=y KVM: SVM: Append "_enabled" to module-scoped SEV/SEV-ES control variables KVM: SEV: Mask CPUID[0x8000001F].eax according to supported features KVM: SVM: Move SEV module params/variables to sev.c KVM: SVM: Disable SEV/SEV-ES if NPT is disabled KVM: SVM: Free sev_asid_bitmap during init if SEV setup fails KVM: SVM: Zero out the VMCB array used to track SEV ASID association x86/sev: Drop redundant and potentially misleading 'sev_enabled' KVM: x86: Move reverse CPUID helpers to separate header file KVM: x86: Rename GPR accessors to make mode-aware variants the defaults ... |
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.. | ||
book3s_32_mmu_host.c | ||
book3s_32_mmu.c | ||
book3s_32_sr.S | ||
book3s_64_mmu_host.c | ||
book3s_64_mmu_hv.c | ||
book3s_64_mmu_radix.c | ||
book3s_64_mmu.c | ||
book3s_64_slb.S | ||
book3s_64_vio_hv.c | ||
book3s_64_vio.c | ||
book3s_emulate.c | ||
book3s_exports.c | ||
book3s_hv_builtin.c | ||
book3s_hv_hmi.c | ||
book3s_hv_interrupts.S | ||
book3s_hv_nested.c | ||
book3s_hv_ras.c | ||
book3s_hv_rm_mmu.c | ||
book3s_hv_rm_xics.c | ||
book3s_hv_rm_xive.c | ||
book3s_hv_rmhandlers.S | ||
book3s_hv_tm_builtin.c | ||
book3s_hv_tm.c | ||
book3s_hv_uvmem.c | ||
book3s_hv.c | ||
book3s_interrupts.S | ||
book3s_mmu_hpte.c | ||
book3s_paired_singles.c | ||
book3s_pr_papr.c | ||
book3s_pr.c | ||
book3s_rmhandlers.S | ||
book3s_rtas.c | ||
book3s_segment.S | ||
book3s_xics.c | ||
book3s_xics.h | ||
book3s_xive_native.c | ||
book3s_xive_template.c | ||
book3s_xive.c | ||
book3s_xive.h | ||
book3s.c | ||
book3s.h | ||
booke_emulate.c | ||
booke_interrupts.S | ||
booke.c | ||
booke.h | ||
bookehv_interrupts.S | ||
e500_emulate.c | ||
e500_mmu_host.c | ||
e500_mmu_host.h | ||
e500_mmu.c | ||
e500.c | ||
e500.h | ||
e500mc.c | ||
emulate_loadstore.c | ||
emulate.c | ||
fpu.S | ||
irq.h | ||
Kconfig | ||
Makefile | ||
mpic.c | ||
powerpc.c | ||
timing.c | ||
timing.h | ||
tm.S | ||
trace_book3s.h | ||
trace_booke.h | ||
trace_hv.h | ||
trace_pr.h | ||
trace.h |