a35707c3d8
Some current cpus based on T-Head cores implement memory-types way different than described in the svpbmt spec even going so far as using PTE bits marked as reserved. Add the T-Head vendor-id and necessary errata code to replace the affected instructions. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Tested-by: Samuel Holland <samuel@sholland.org> Link: https://lore.kernel.org/r/20220511192921.2223629-13-heiko@sntech.de Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
12 lines
203 B
C
12 lines
203 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2021 SiFive
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*/
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#ifndef ASM_VENDOR_LIST_H
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#define ASM_VENDOR_LIST_H
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#define SIFIVE_VENDOR_ID 0x489
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#define THEAD_VENDOR_ID 0x5b7
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#endif
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