b675542323
Now that we have a graph schema, rework the display related schemas to use it. Mostly this is adding a reference to graph.yaml and dropping duplicate parts from schemas. In panel-common.yaml, 'ports' is dropped. Any binding using 'ports' should be one with more than 1 port node, and the binding must define what each port is. Note that ti,sn65dsi86.yaml, ti,tfp410,yaml and toshiba,tc358768.yaml will need further updates to use video-interfaces.yaml once that lands. Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Sam Ravnborg <sam@ravnborg.org> Cc: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Thomas Zimmermann <tzimmermann@suse.de> Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Link: https://patchwork.freedesktop.org/patch/msgid/20210104180724.2275098-1-robh@kernel.org
106 lines
2.5 KiB
YAML
106 lines
2.5 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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# Copyright 2019 Texas Instruments Incorporated
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/display/ti/ti,k2g-dss.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Texas Instruments K2G Display Subsystem
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maintainers:
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- Jyri Sarha <jsarha@ti.com>
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- Tomi Valkeinen <tomi.valkeinen@ti.com>
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description: |
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The K2G DSS is an ultra-light version of TI Keystone Display
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SubSystem. It has only one output port and video plane. The
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output is DPI.
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properties:
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compatible:
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const: ti,k2g-dss
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reg:
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items:
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- description: cfg DSS top level
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- description: common DISPC common
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- description: VID1 video plane 1
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- description: OVR1 overlay manager for vp1
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- description: VP1 video port 1
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reg-names:
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items:
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- const: cfg
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- const: common
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- const: vid1
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- const: ovr1
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- const: vp1
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clocks:
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items:
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- description: fck DSS functional clock
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- description: vp1 Video Port 1 pixel clock
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clock-names:
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items:
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- const: fck
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- const: vp1
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interrupts:
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maxItems: 1
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power-domains:
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maxItems: 1
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description: phandle to the associated power domain
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port:
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$ref: /schemas/graph.yaml#/properties/port
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description:
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The DSS DPI output port node
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max-memory-bandwidth:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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Input memory (from main memory to dispc) bandwidth limit in
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bytes per second
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required:
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- compatible
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- reg
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- reg-names
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- clocks
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- clock-names
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- interrupts
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- port
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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dss: dss@2540000 {
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compatible = "ti,k2g-dss";
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reg = <0x02540000 0x400>,
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<0x02550000 0x1000>,
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<0x02557000 0x1000>,
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<0x0255a800 0x100>,
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<0x0255ac00 0x100>;
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reg-names = "cfg", "common", "vid1", "ovr1", "vp1";
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clocks = <&k2g_clks 0x2 0>,
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<&k2g_clks 0x2 1>;
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clock-names = "fck", "vp1";
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interrupts = <GIC_SPI 247 IRQ_TYPE_EDGE_RISING>;
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power-domains = <&k2g_pds 0x2>;
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max-memory-bandwidth = <230000000>;
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port {
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dpi_out: endpoint {
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remote-endpoint = <&sii9022_in>;
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};
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};
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};
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