a537b8d68e
The #size-cells for the pmics are 0, but we specify a size in the reg property so that MPP and GPIO modules can figure out how many pins there are. Now that we've done that by counting irqs, we can remove the size elements in the reg properties and be DT compliant. Signed-off-by: Andy Gross <andy.gross@linaro.org> Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
111 lines
2.7 KiB
Plaintext
111 lines
2.7 KiB
Plaintext
#include <dt-bindings/iio/qcom,spmi-vadc.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/spmi/spmi.h>
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&spmi_bus {
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pma8084_0: pma8084@0 {
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compatible = "qcom,pma8084", "qcom,spmi-pmic";
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reg = <0x0 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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rtc@6000 {
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compatible = "qcom,pm8941-rtc";
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reg = <0x6000>,
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<0x6100>;
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reg-names = "rtc", "alarm";
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interrupts = <0x0 0x61 0x1 IRQ_TYPE_EDGE_RISING>;
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};
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pma8084_gpios: gpios@c000 {
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compatible = "qcom,pma8084-gpio", "qcom,spmi-gpio";
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reg = <0xc000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <0 0xc0 0 IRQ_TYPE_NONE>,
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<0 0xc1 0 IRQ_TYPE_NONE>,
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<0 0xc2 0 IRQ_TYPE_NONE>,
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<0 0xc3 0 IRQ_TYPE_NONE>,
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<0 0xc4 0 IRQ_TYPE_NONE>,
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<0 0xc5 0 IRQ_TYPE_NONE>,
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<0 0xc6 0 IRQ_TYPE_NONE>,
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<0 0xc7 0 IRQ_TYPE_NONE>,
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<0 0xc8 0 IRQ_TYPE_NONE>,
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<0 0xc9 0 IRQ_TYPE_NONE>,
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<0 0xca 0 IRQ_TYPE_NONE>,
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<0 0xcb 0 IRQ_TYPE_NONE>,
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<0 0xcc 0 IRQ_TYPE_NONE>,
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<0 0xcd 0 IRQ_TYPE_NONE>,
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<0 0xce 0 IRQ_TYPE_NONE>,
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<0 0xcf 0 IRQ_TYPE_NONE>,
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<0 0xd0 0 IRQ_TYPE_NONE>,
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<0 0xd1 0 IRQ_TYPE_NONE>,
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<0 0xd2 0 IRQ_TYPE_NONE>,
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<0 0xd3 0 IRQ_TYPE_NONE>,
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<0 0xd4 0 IRQ_TYPE_NONE>,
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<0 0xd5 0 IRQ_TYPE_NONE>;
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};
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pma8084_mpps: mpps@a000 {
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compatible = "qcom,pma8084-mpp", "qcom,spmi-mpp";
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reg = <0xa000>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupts = <0 0xa0 0 IRQ_TYPE_NONE>,
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<0 0xa1 0 IRQ_TYPE_NONE>,
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<0 0xa2 0 IRQ_TYPE_NONE>,
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<0 0xa3 0 IRQ_TYPE_NONE>,
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<0 0xa4 0 IRQ_TYPE_NONE>,
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<0 0xa5 0 IRQ_TYPE_NONE>,
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<0 0xa6 0 IRQ_TYPE_NONE>,
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<0 0xa7 0 IRQ_TYPE_NONE>;
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};
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pma8084_temp: temp-alarm@2400 {
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compatible = "qcom,spmi-temp-alarm";
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reg = <0x2400>;
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interrupts = <0 0x24 0 IRQ_TYPE_EDGE_RISING>;
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#thermal-sensor-cells = <0>;
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io-channels = <&pma8084_vadc VADC_DIE_TEMP>;
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io-channel-names = "thermal";
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};
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pma8084_vadc: vadc@3100 {
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compatible = "qcom,spmi-vadc";
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reg = <0x3100>;
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interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
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#address-cells = <1>;
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#size-cells = <0>;
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#io-channel-cells = <1>;
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io-channel-ranges;
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die_temp {
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reg = <VADC_DIE_TEMP>;
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};
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ref_625mv {
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reg = <VADC_REF_625MV>;
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};
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ref_1250v {
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reg = <VADC_REF_1250MV>;
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};
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ref_buf_625mv {
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reg = <VADC_SPARE1>;
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};
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ref_gnd {
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reg = <VADC_GND_REF>;
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};
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ref_vdd {
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reg = <VADC_VDD_VADC>;
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};
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};
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};
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pma8084_1: pma8084@1 {
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compatible = "qcom,pma8084", "qcom,spmi-pmic";
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reg = <0x1 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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