139c949f7f
mt7621 has the following memory map:
0x0-0x1c000000: lower 448m memory
0x1c000000-0x2000000: peripheral registers
0x20000000-0x2400000: higher 64m memory
detect_memory_region in arch/mips/kernel/setup.c only adds the first
memory region and isn't suitable for 512m memory detection because
it may accidentally read the memory area for peripheral registers.
This commit adds memory detection capability for mt7621:
1. Add the highmem area when 512m is detected.
2. Guard memcmp from accessing peripheral registers:
This only happens when a user decided to change kernel load address
to 256m or higher address. Since this is a quite unusual case, we
just skip 512m testing and return 256m as memory size.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
[Minor commit message reword, make mt7621_memory_detect static]
Signed-off-by: Ilya Lipnitskiy <ilya.lipnitskiy@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
36 lines
848 B
C
36 lines
848 B
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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*
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* Copyright (C) 2015 John Crispin <john@phrozen.org>
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*/
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#ifndef _MT7621_REGS_H_
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#define _MT7621_REGS_H_
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#define MT7621_PALMBUS_BASE 0x1C000000
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#define MT7621_PALMBUS_SIZE 0x03FFFFFF
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#define MT7621_SYSC_BASE 0x1E000000
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#define SYSC_REG_CHIP_NAME0 0x00
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#define SYSC_REG_CHIP_NAME1 0x04
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#define SYSC_REG_CHIP_REV 0x0c
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#define SYSC_REG_SYSTEM_CONFIG0 0x10
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#define SYSC_REG_SYSTEM_CONFIG1 0x14
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#define CHIP_REV_PKG_MASK 0x1
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#define CHIP_REV_PKG_SHIFT 16
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#define CHIP_REV_VER_MASK 0xf
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#define CHIP_REV_VER_SHIFT 8
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#define CHIP_REV_ECO_MASK 0xf
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#define MT7621_LOWMEM_BASE 0x0
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#define MT7621_LOWMEM_MAX_SIZE 0x1C000000
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#define MT7621_HIGHMEM_BASE 0x20000000
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#define MT7621_HIGHMEM_SIZE 0x4000000
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#define MT7621_CHIP_NAME0 0x3637544D
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#define MT7621_CHIP_NAME1 0x20203132
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#endif
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