62210f7509
The UEFI loads a lite variant of the ADSP firmware to support charging use cases. The kernel needs to unload and reload it with the firmware that has full feature support for audio. This patch arbitarily shutsdown the lite firmware before loading the full firmware. Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20240212-x1e80100-remoteproc-v2-3-604614367f38@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
1383 lines
33 KiB
C
1383 lines
33 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996
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*
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* Copyright (C) 2016 Linaro Ltd
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* Copyright (C) 2014 Sony Mobile Communications AB
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* Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
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*/
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/firmware.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_reserved_mem.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include <linux/firmware/qcom/qcom_scm.h>
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#include <linux/regulator/consumer.h>
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#include <linux/remoteproc.h>
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#include <linux/soc/qcom/mdt_loader.h>
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#include <linux/soc/qcom/smem.h>
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#include <linux/soc/qcom/smem_state.h>
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#include "qcom_common.h"
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#include "qcom_pil_info.h"
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#include "qcom_q6v5.h"
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#include "remoteproc_internal.h"
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#define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100
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#define MAX_ASSIGN_COUNT 3
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struct adsp_data {
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int crash_reason_smem;
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const char *firmware_name;
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const char *dtb_firmware_name;
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int pas_id;
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int dtb_pas_id;
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int lite_pas_id;
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unsigned int minidump_id;
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bool auto_boot;
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bool decrypt_shutdown;
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char **proxy_pd_names;
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const char *load_state;
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const char *ssr_name;
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const char *sysmon_name;
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int ssctl_id;
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int region_assign_idx;
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int region_assign_count;
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bool region_assign_shared;
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int region_assign_vmid;
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};
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struct qcom_adsp {
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struct device *dev;
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struct rproc *rproc;
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struct qcom_q6v5 q6v5;
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struct clk *xo;
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struct clk *aggre2_clk;
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struct regulator *cx_supply;
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struct regulator *px_supply;
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struct device *proxy_pds[3];
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int proxy_pd_count;
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const char *dtb_firmware_name;
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int pas_id;
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int dtb_pas_id;
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int lite_pas_id;
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unsigned int minidump_id;
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int crash_reason_smem;
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bool decrypt_shutdown;
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const char *info_name;
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const struct firmware *firmware;
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const struct firmware *dtb_firmware;
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struct completion start_done;
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struct completion stop_done;
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phys_addr_t mem_phys;
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phys_addr_t dtb_mem_phys;
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phys_addr_t mem_reloc;
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phys_addr_t dtb_mem_reloc;
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phys_addr_t region_assign_phys[MAX_ASSIGN_COUNT];
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void *mem_region;
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void *dtb_mem_region;
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size_t mem_size;
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size_t dtb_mem_size;
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size_t region_assign_size[MAX_ASSIGN_COUNT];
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int region_assign_idx;
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int region_assign_count;
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bool region_assign_shared;
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int region_assign_vmid;
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u64 region_assign_owners[MAX_ASSIGN_COUNT];
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struct qcom_rproc_glink glink_subdev;
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struct qcom_rproc_subdev smd_subdev;
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struct qcom_rproc_ssr ssr_subdev;
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struct qcom_sysmon *sysmon;
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struct qcom_scm_pas_metadata pas_metadata;
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struct qcom_scm_pas_metadata dtb_pas_metadata;
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};
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static void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment,
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void *dest, size_t offset, size_t size)
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{
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struct qcom_adsp *adsp = rproc->priv;
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int total_offset;
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total_offset = segment->da + segment->offset + offset - adsp->mem_phys;
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if (total_offset < 0 || total_offset + size > adsp->mem_size) {
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dev_err(adsp->dev,
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"invalid copy request for segment %pad with offset %zu and size %zu)\n",
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&segment->da, offset, size);
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memset(dest, 0xff, size);
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return;
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}
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memcpy_fromio(dest, adsp->mem_region + total_offset, size);
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}
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static void adsp_minidump(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = rproc->priv;
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if (rproc->dump_conf == RPROC_COREDUMP_DISABLED)
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return;
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qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump);
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}
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static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds,
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size_t pd_count)
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{
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int ret;
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int i;
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for (i = 0; i < pd_count; i++) {
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dev_pm_genpd_set_performance_state(pds[i], INT_MAX);
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ret = pm_runtime_get_sync(pds[i]);
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if (ret < 0) {
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pm_runtime_put_noidle(pds[i]);
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dev_pm_genpd_set_performance_state(pds[i], 0);
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goto unroll_pd_votes;
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}
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}
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return 0;
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unroll_pd_votes:
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for (i--; i >= 0; i--) {
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dev_pm_genpd_set_performance_state(pds[i], 0);
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pm_runtime_put(pds[i]);
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}
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return ret;
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};
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static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds,
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size_t pd_count)
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{
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int i;
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for (i = 0; i < pd_count; i++) {
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dev_pm_genpd_set_performance_state(pds[i], 0);
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pm_runtime_put(pds[i]);
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}
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}
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static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp)
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{
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unsigned int retry_num = 50;
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int ret;
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do {
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msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS);
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ret = qcom_scm_pas_shutdown(adsp->pas_id);
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} while (ret == -EINVAL && --retry_num);
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return ret;
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}
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static int adsp_unprepare(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = rproc->priv;
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/*
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* adsp_load() did pass pas_metadata to the SCM driver for storing
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* metadata context. It might have been released already if
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* auth_and_reset() was successful, but in other cases clean it up
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* here.
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*/
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qcom_scm_pas_metadata_release(&adsp->pas_metadata);
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if (adsp->dtb_pas_id)
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qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
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return 0;
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}
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static int adsp_load(struct rproc *rproc, const struct firmware *fw)
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{
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struct qcom_adsp *adsp = rproc->priv;
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int ret;
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/* Store firmware handle to be used in adsp_start() */
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adsp->firmware = fw;
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if (adsp->lite_pas_id)
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ret = qcom_scm_pas_shutdown(adsp->lite_pas_id);
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if (adsp->dtb_pas_id) {
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ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev);
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if (ret) {
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dev_err(adsp->dev, "request_firmware failed for %s: %d\n",
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adsp->dtb_firmware_name, ret);
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return ret;
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}
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ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
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adsp->dtb_pas_id, adsp->dtb_mem_phys,
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&adsp->dtb_pas_metadata);
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if (ret)
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goto release_dtb_firmware;
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ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name,
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adsp->dtb_pas_id, adsp->dtb_mem_region,
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adsp->dtb_mem_phys, adsp->dtb_mem_size,
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&adsp->dtb_mem_reloc);
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if (ret)
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goto release_dtb_metadata;
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}
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return 0;
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release_dtb_metadata:
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qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
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release_dtb_firmware:
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release_firmware(adsp->dtb_firmware);
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return ret;
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}
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static int adsp_start(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = rproc->priv;
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int ret;
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ret = qcom_q6v5_prepare(&adsp->q6v5);
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if (ret)
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return ret;
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ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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if (ret < 0)
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goto disable_irqs;
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ret = clk_prepare_enable(adsp->xo);
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if (ret)
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goto disable_proxy_pds;
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ret = clk_prepare_enable(adsp->aggre2_clk);
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if (ret)
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goto disable_xo_clk;
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if (adsp->cx_supply) {
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ret = regulator_enable(adsp->cx_supply);
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if (ret)
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goto disable_aggre2_clk;
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}
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if (adsp->px_supply) {
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ret = regulator_enable(adsp->px_supply);
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if (ret)
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goto disable_cx_supply;
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}
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if (adsp->dtb_pas_id) {
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ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id);
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if (ret) {
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dev_err(adsp->dev,
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"failed to authenticate dtb image and release reset\n");
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goto disable_px_supply;
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}
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}
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ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
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adsp->mem_phys, &adsp->pas_metadata);
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if (ret)
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goto disable_px_supply;
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ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id,
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adsp->mem_region, adsp->mem_phys, adsp->mem_size,
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&adsp->mem_reloc);
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if (ret)
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goto release_pas_metadata;
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qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size);
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ret = qcom_scm_pas_auth_and_reset(adsp->pas_id);
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if (ret) {
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dev_err(adsp->dev,
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"failed to authenticate image and release reset\n");
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goto release_pas_metadata;
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}
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ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000));
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if (ret == -ETIMEDOUT) {
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dev_err(adsp->dev, "start timed out\n");
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qcom_scm_pas_shutdown(adsp->pas_id);
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goto release_pas_metadata;
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}
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qcom_scm_pas_metadata_release(&adsp->pas_metadata);
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if (adsp->dtb_pas_id)
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qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
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/* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
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adsp->firmware = NULL;
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return 0;
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release_pas_metadata:
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qcom_scm_pas_metadata_release(&adsp->pas_metadata);
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if (adsp->dtb_pas_id)
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qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata);
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disable_px_supply:
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if (adsp->px_supply)
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regulator_disable(adsp->px_supply);
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disable_cx_supply:
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if (adsp->cx_supply)
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regulator_disable(adsp->cx_supply);
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disable_aggre2_clk:
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clk_disable_unprepare(adsp->aggre2_clk);
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disable_xo_clk:
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clk_disable_unprepare(adsp->xo);
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disable_proxy_pds:
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adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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disable_irqs:
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qcom_q6v5_unprepare(&adsp->q6v5);
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/* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */
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adsp->firmware = NULL;
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return ret;
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}
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static void qcom_pas_handover(struct qcom_q6v5 *q6v5)
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{
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struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5);
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if (adsp->px_supply)
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regulator_disable(adsp->px_supply);
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if (adsp->cx_supply)
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regulator_disable(adsp->cx_supply);
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clk_disable_unprepare(adsp->aggre2_clk);
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clk_disable_unprepare(adsp->xo);
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adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
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}
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static int adsp_stop(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = rproc->priv;
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int handover;
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int ret;
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ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
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if (ret == -ETIMEDOUT)
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dev_err(adsp->dev, "timed out on wait\n");
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ret = qcom_scm_pas_shutdown(adsp->pas_id);
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if (ret && adsp->decrypt_shutdown)
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ret = adsp_shutdown_poll_decrypt(adsp);
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if (ret)
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dev_err(adsp->dev, "failed to shutdown: %d\n", ret);
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if (adsp->dtb_pas_id) {
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ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id);
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if (ret)
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dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret);
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}
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handover = qcom_q6v5_unprepare(&adsp->q6v5);
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if (handover)
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qcom_pas_handover(&adsp->q6v5);
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return ret;
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}
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static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem)
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{
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struct qcom_adsp *adsp = rproc->priv;
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int offset;
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offset = da - adsp->mem_reloc;
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if (offset < 0 || offset + len > adsp->mem_size)
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return NULL;
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if (is_iomem)
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*is_iomem = true;
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return adsp->mem_region + offset;
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}
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static unsigned long adsp_panic(struct rproc *rproc)
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{
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struct qcom_adsp *adsp = rproc->priv;
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return qcom_q6v5_panic(&adsp->q6v5);
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}
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static const struct rproc_ops adsp_ops = {
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.unprepare = adsp_unprepare,
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.start = adsp_start,
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.stop = adsp_stop,
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.da_to_va = adsp_da_to_va,
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.parse_fw = qcom_register_dump_segments,
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.load = adsp_load,
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.panic = adsp_panic,
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};
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static const struct rproc_ops adsp_minidump_ops = {
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.unprepare = adsp_unprepare,
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.start = adsp_start,
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.stop = adsp_stop,
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.da_to_va = adsp_da_to_va,
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.parse_fw = qcom_register_dump_segments,
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.load = adsp_load,
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.panic = adsp_panic,
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.coredump = adsp_minidump,
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};
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static int adsp_init_clock(struct qcom_adsp *adsp)
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{
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int ret;
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adsp->xo = devm_clk_get(adsp->dev, "xo");
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if (IS_ERR(adsp->xo)) {
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ret = PTR_ERR(adsp->xo);
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if (ret != -EPROBE_DEFER)
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dev_err(adsp->dev, "failed to get xo clock");
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return ret;
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}
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adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2");
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if (IS_ERR(adsp->aggre2_clk)) {
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ret = PTR_ERR(adsp->aggre2_clk);
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if (ret != -EPROBE_DEFER)
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dev_err(adsp->dev,
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"failed to get aggre2 clock");
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return ret;
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}
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return 0;
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}
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static int adsp_init_regulator(struct qcom_adsp *adsp)
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{
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adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx");
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if (IS_ERR(adsp->cx_supply)) {
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if (PTR_ERR(adsp->cx_supply) == -ENODEV)
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adsp->cx_supply = NULL;
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else
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return PTR_ERR(adsp->cx_supply);
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}
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if (adsp->cx_supply)
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regulator_set_load(adsp->cx_supply, 100000);
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adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px");
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if (IS_ERR(adsp->px_supply)) {
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|
if (PTR_ERR(adsp->px_supply) == -ENODEV)
|
|
adsp->px_supply = NULL;
|
|
else
|
|
return PTR_ERR(adsp->px_supply);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int adsp_pds_attach(struct device *dev, struct device **devs,
|
|
char **pd_names)
|
|
{
|
|
size_t num_pds = 0;
|
|
int ret;
|
|
int i;
|
|
|
|
if (!pd_names)
|
|
return 0;
|
|
|
|
/* Handle single power domain */
|
|
if (dev->pm_domain) {
|
|
devs[0] = dev;
|
|
pm_runtime_enable(dev);
|
|
return 1;
|
|
}
|
|
|
|
while (pd_names[num_pds])
|
|
num_pds++;
|
|
|
|
for (i = 0; i < num_pds; i++) {
|
|
devs[i] = dev_pm_domain_attach_by_name(dev, pd_names[i]);
|
|
if (IS_ERR_OR_NULL(devs[i])) {
|
|
ret = PTR_ERR(devs[i]) ? : -ENODATA;
|
|
goto unroll_attach;
|
|
}
|
|
}
|
|
|
|
return num_pds;
|
|
|
|
unroll_attach:
|
|
for (i--; i >= 0; i--)
|
|
dev_pm_domain_detach(devs[i], false);
|
|
|
|
return ret;
|
|
};
|
|
|
|
static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds,
|
|
size_t pd_count)
|
|
{
|
|
struct device *dev = adsp->dev;
|
|
int i;
|
|
|
|
/* Handle single power domain */
|
|
if (dev->pm_domain && pd_count) {
|
|
pm_runtime_disable(dev);
|
|
return;
|
|
}
|
|
|
|
for (i = 0; i < pd_count; i++)
|
|
dev_pm_domain_detach(pds[i], false);
|
|
}
|
|
|
|
static int adsp_alloc_memory_region(struct qcom_adsp *adsp)
|
|
{
|
|
struct reserved_mem *rmem;
|
|
struct device_node *node;
|
|
|
|
node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0);
|
|
if (!node) {
|
|
dev_err(adsp->dev, "no memory-region specified\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
rmem = of_reserved_mem_lookup(node);
|
|
of_node_put(node);
|
|
if (!rmem) {
|
|
dev_err(adsp->dev, "unable to resolve memory-region\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
adsp->mem_phys = adsp->mem_reloc = rmem->base;
|
|
adsp->mem_size = rmem->size;
|
|
adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size);
|
|
if (!adsp->mem_region) {
|
|
dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n",
|
|
&rmem->base, adsp->mem_size);
|
|
return -EBUSY;
|
|
}
|
|
|
|
if (!adsp->dtb_pas_id)
|
|
return 0;
|
|
|
|
node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1);
|
|
if (!node) {
|
|
dev_err(adsp->dev, "no dtb memory-region specified\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
rmem = of_reserved_mem_lookup(node);
|
|
of_node_put(node);
|
|
if (!rmem) {
|
|
dev_err(adsp->dev, "unable to resolve dtb memory-region\n");
|
|
return -EINVAL;
|
|
}
|
|
|
|
adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base;
|
|
adsp->dtb_mem_size = rmem->size;
|
|
adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size);
|
|
if (!adsp->dtb_mem_region) {
|
|
dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n",
|
|
&rmem->base, adsp->dtb_mem_size);
|
|
return -EBUSY;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int adsp_assign_memory_region(struct qcom_adsp *adsp)
|
|
{
|
|
struct qcom_scm_vmperm perm[MAX_ASSIGN_COUNT];
|
|
struct device_node *node;
|
|
unsigned int perm_size;
|
|
int offset;
|
|
int ret;
|
|
|
|
if (!adsp->region_assign_idx)
|
|
return 0;
|
|
|
|
for (offset = 0; offset < adsp->region_assign_count; ++offset) {
|
|
struct reserved_mem *rmem = NULL;
|
|
|
|
node = of_parse_phandle(adsp->dev->of_node, "memory-region",
|
|
adsp->region_assign_idx + offset);
|
|
if (node)
|
|
rmem = of_reserved_mem_lookup(node);
|
|
of_node_put(node);
|
|
if (!rmem) {
|
|
dev_err(adsp->dev, "unable to resolve shareable memory-region index %d\n",
|
|
offset);
|
|
return -EINVAL;
|
|
}
|
|
|
|
if (adsp->region_assign_shared) {
|
|
perm[0].vmid = QCOM_SCM_VMID_HLOS;
|
|
perm[0].perm = QCOM_SCM_PERM_RW;
|
|
perm[1].vmid = adsp->region_assign_vmid;
|
|
perm[1].perm = QCOM_SCM_PERM_RW;
|
|
perm_size = 2;
|
|
} else {
|
|
perm[0].vmid = adsp->region_assign_vmid;
|
|
perm[0].perm = QCOM_SCM_PERM_RW;
|
|
perm_size = 1;
|
|
}
|
|
|
|
adsp->region_assign_phys[offset] = rmem->base;
|
|
adsp->region_assign_size[offset] = rmem->size;
|
|
adsp->region_assign_owners[offset] = BIT(QCOM_SCM_VMID_HLOS);
|
|
|
|
ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
|
|
adsp->region_assign_size[offset],
|
|
&adsp->region_assign_owners[offset],
|
|
perm, perm_size);
|
|
if (ret < 0) {
|
|
dev_err(adsp->dev, "assign memory %d failed\n", offset);
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void adsp_unassign_memory_region(struct qcom_adsp *adsp)
|
|
{
|
|
struct qcom_scm_vmperm perm;
|
|
int offset;
|
|
int ret;
|
|
|
|
if (!adsp->region_assign_idx || adsp->region_assign_shared)
|
|
return;
|
|
|
|
for (offset = 0; offset < adsp->region_assign_count; ++offset) {
|
|
perm.vmid = QCOM_SCM_VMID_HLOS;
|
|
perm.perm = QCOM_SCM_PERM_RW;
|
|
|
|
ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset],
|
|
adsp->region_assign_size[offset],
|
|
&adsp->region_assign_owners[offset],
|
|
&perm, 1);
|
|
if (ret < 0)
|
|
dev_err(adsp->dev, "unassign memory %d failed\n", offset);
|
|
}
|
|
}
|
|
|
|
static int adsp_probe(struct platform_device *pdev)
|
|
{
|
|
const struct adsp_data *desc;
|
|
struct qcom_adsp *adsp;
|
|
struct rproc *rproc;
|
|
const char *fw_name, *dtb_fw_name = NULL;
|
|
const struct rproc_ops *ops = &adsp_ops;
|
|
int ret;
|
|
|
|
desc = of_device_get_match_data(&pdev->dev);
|
|
if (!desc)
|
|
return -EINVAL;
|
|
|
|
if (!qcom_scm_is_available())
|
|
return -EPROBE_DEFER;
|
|
|
|
fw_name = desc->firmware_name;
|
|
ret = of_property_read_string(pdev->dev.of_node, "firmware-name",
|
|
&fw_name);
|
|
if (ret < 0 && ret != -EINVAL)
|
|
return ret;
|
|
|
|
if (desc->dtb_firmware_name) {
|
|
dtb_fw_name = desc->dtb_firmware_name;
|
|
ret = of_property_read_string_index(pdev->dev.of_node, "firmware-name", 1,
|
|
&dtb_fw_name);
|
|
if (ret < 0 && ret != -EINVAL)
|
|
return ret;
|
|
}
|
|
|
|
if (desc->minidump_id)
|
|
ops = &adsp_minidump_ops;
|
|
|
|
rproc = devm_rproc_alloc(&pdev->dev, pdev->name, ops, fw_name, sizeof(*adsp));
|
|
|
|
if (!rproc) {
|
|
dev_err(&pdev->dev, "unable to allocate remoteproc\n");
|
|
return -ENOMEM;
|
|
}
|
|
|
|
rproc->auto_boot = desc->auto_boot;
|
|
rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE);
|
|
|
|
adsp = rproc->priv;
|
|
adsp->dev = &pdev->dev;
|
|
adsp->rproc = rproc;
|
|
adsp->minidump_id = desc->minidump_id;
|
|
adsp->pas_id = desc->pas_id;
|
|
adsp->lite_pas_id = desc->lite_pas_id;
|
|
adsp->info_name = desc->sysmon_name;
|
|
adsp->decrypt_shutdown = desc->decrypt_shutdown;
|
|
adsp->region_assign_idx = desc->region_assign_idx;
|
|
adsp->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count);
|
|
adsp->region_assign_vmid = desc->region_assign_vmid;
|
|
adsp->region_assign_shared = desc->region_assign_shared;
|
|
if (dtb_fw_name) {
|
|
adsp->dtb_firmware_name = dtb_fw_name;
|
|
adsp->dtb_pas_id = desc->dtb_pas_id;
|
|
}
|
|
platform_set_drvdata(pdev, adsp);
|
|
|
|
ret = device_init_wakeup(adsp->dev, true);
|
|
if (ret)
|
|
goto free_rproc;
|
|
|
|
ret = adsp_alloc_memory_region(adsp);
|
|
if (ret)
|
|
goto free_rproc;
|
|
|
|
ret = adsp_assign_memory_region(adsp);
|
|
if (ret)
|
|
goto free_rproc;
|
|
|
|
ret = adsp_init_clock(adsp);
|
|
if (ret)
|
|
goto free_rproc;
|
|
|
|
ret = adsp_init_regulator(adsp);
|
|
if (ret)
|
|
goto free_rproc;
|
|
|
|
ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds,
|
|
desc->proxy_pd_names);
|
|
if (ret < 0)
|
|
goto free_rproc;
|
|
adsp->proxy_pd_count = ret;
|
|
|
|
ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state,
|
|
qcom_pas_handover);
|
|
if (ret)
|
|
goto detach_proxy_pds;
|
|
|
|
qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name);
|
|
qcom_add_smd_subdev(rproc, &adsp->smd_subdev);
|
|
adsp->sysmon = qcom_add_sysmon_subdev(rproc,
|
|
desc->sysmon_name,
|
|
desc->ssctl_id);
|
|
if (IS_ERR(adsp->sysmon)) {
|
|
ret = PTR_ERR(adsp->sysmon);
|
|
goto detach_proxy_pds;
|
|
}
|
|
|
|
qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name);
|
|
ret = rproc_add(rproc);
|
|
if (ret)
|
|
goto detach_proxy_pds;
|
|
|
|
return 0;
|
|
|
|
detach_proxy_pds:
|
|
adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
|
|
free_rproc:
|
|
device_init_wakeup(adsp->dev, false);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void adsp_remove(struct platform_device *pdev)
|
|
{
|
|
struct qcom_adsp *adsp = platform_get_drvdata(pdev);
|
|
|
|
rproc_del(adsp->rproc);
|
|
|
|
qcom_q6v5_deinit(&adsp->q6v5);
|
|
adsp_unassign_memory_region(adsp);
|
|
qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev);
|
|
qcom_remove_sysmon_subdev(adsp->sysmon);
|
|
qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev);
|
|
qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev);
|
|
adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count);
|
|
device_init_wakeup(adsp->dev, false);
|
|
}
|
|
|
|
static const struct adsp_data adsp_resource_init = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.auto_boot = true,
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data sdm845_adsp_resource_init = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.auto_boot = true,
|
|
.load_state = "adsp",
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data sm6350_adsp_resource = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"lcx",
|
|
"lmx",
|
|
NULL
|
|
},
|
|
.load_state = "adsp",
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data sm6375_mpss_resource = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "modem.mdt",
|
|
.pas_id = 4,
|
|
.minidump_id = 3,
|
|
.auto_boot = false,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "modem",
|
|
.ssctl_id = 0x12,
|
|
};
|
|
|
|
static const struct adsp_data sm8150_adsp_resource = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
|
|
.load_state = "adsp",
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data sm8250_adsp_resource = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"lcx",
|
|
"lmx",
|
|
NULL
|
|
},
|
|
.load_state = "adsp",
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data sm8350_adsp_resource = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"lcx",
|
|
"lmx",
|
|
NULL
|
|
},
|
|
.load_state = "adsp",
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data msm8996_adsp_resource = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.pas_id = 1,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data cdsp_resource_init = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.auto_boot = true,
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sdm845_cdsp_resource_init = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.auto_boot = true,
|
|
.load_state = "cdsp",
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sm6350_cdsp_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mx",
|
|
NULL
|
|
},
|
|
.load_state = "cdsp",
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sm8150_cdsp_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
|
|
.load_state = "cdsp",
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sm8250_cdsp_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
|
|
.load_state = "cdsp",
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sc8280xp_nsp0_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"nsp",
|
|
NULL
|
|
},
|
|
.ssr_name = "cdsp0",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sc8280xp_nsp1_resource = {
|
|
.crash_reason_smem = 633,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 30,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"nsp",
|
|
NULL
|
|
},
|
|
.ssr_name = "cdsp1",
|
|
.sysmon_name = "cdsp1",
|
|
.ssctl_id = 0x20,
|
|
};
|
|
|
|
static const struct adsp_data x1e80100_adsp_resource = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.dtb_firmware_name = "adsp_dtb.mdt",
|
|
.pas_id = 1,
|
|
.dtb_pas_id = 0x24,
|
|
.lite_pas_id = 0x1f,
|
|
.minidump_id = 5,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"lcx",
|
|
"lmx",
|
|
NULL
|
|
},
|
|
.load_state = "adsp",
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data x1e80100_cdsp_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.dtb_firmware_name = "cdsp_dtb.mdt",
|
|
.pas_id = 18,
|
|
.dtb_pas_id = 0x25,
|
|
.minidump_id = 7,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mxc",
|
|
"nsp",
|
|
NULL
|
|
},
|
|
.load_state = "cdsp",
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sm8350_cdsp_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.pas_id = 18,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mxc",
|
|
NULL
|
|
},
|
|
.load_state = "cdsp",
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data mpss_resource_init = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "modem.mdt",
|
|
.pas_id = 4,
|
|
.minidump_id = 3,
|
|
.auto_boot = false,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mss",
|
|
NULL
|
|
},
|
|
.load_state = "modem",
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "modem",
|
|
.ssctl_id = 0x12,
|
|
};
|
|
|
|
static const struct adsp_data sc8180x_mpss_resource = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "modem.mdt",
|
|
.pas_id = 4,
|
|
.auto_boot = false,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
NULL
|
|
},
|
|
.load_state = "modem",
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "modem",
|
|
.ssctl_id = 0x12,
|
|
};
|
|
|
|
static const struct adsp_data msm8996_slpi_resource_init = {
|
|
.crash_reason_smem = 424,
|
|
.firmware_name = "slpi.mdt",
|
|
.pas_id = 12,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"ssc_cx",
|
|
NULL
|
|
},
|
|
.ssr_name = "dsps",
|
|
.sysmon_name = "slpi",
|
|
.ssctl_id = 0x16,
|
|
};
|
|
|
|
static const struct adsp_data sdm845_slpi_resource_init = {
|
|
.crash_reason_smem = 424,
|
|
.firmware_name = "slpi.mdt",
|
|
.pas_id = 12,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"lcx",
|
|
"lmx",
|
|
NULL
|
|
},
|
|
.load_state = "slpi",
|
|
.ssr_name = "dsps",
|
|
.sysmon_name = "slpi",
|
|
.ssctl_id = 0x16,
|
|
};
|
|
|
|
static const struct adsp_data wcss_resource_init = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "wcnss.mdt",
|
|
.pas_id = 6,
|
|
.auto_boot = true,
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "wcnss",
|
|
.ssctl_id = 0x12,
|
|
};
|
|
|
|
static const struct adsp_data sdx55_mpss_resource = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "modem.mdt",
|
|
.pas_id = 4,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mss",
|
|
NULL
|
|
},
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "modem",
|
|
.ssctl_id = 0x22,
|
|
};
|
|
|
|
static const struct adsp_data sm8450_mpss_resource = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "modem.mdt",
|
|
.pas_id = 4,
|
|
.minidump_id = 3,
|
|
.auto_boot = false,
|
|
.decrypt_shutdown = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mss",
|
|
NULL
|
|
},
|
|
.load_state = "modem",
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "modem",
|
|
.ssctl_id = 0x12,
|
|
};
|
|
|
|
static const struct adsp_data sm8550_adsp_resource = {
|
|
.crash_reason_smem = 423,
|
|
.firmware_name = "adsp.mdt",
|
|
.dtb_firmware_name = "adsp_dtb.mdt",
|
|
.pas_id = 1,
|
|
.dtb_pas_id = 0x24,
|
|
.minidump_id = 5,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"lcx",
|
|
"lmx",
|
|
NULL
|
|
},
|
|
.load_state = "adsp",
|
|
.ssr_name = "lpass",
|
|
.sysmon_name = "adsp",
|
|
.ssctl_id = 0x14,
|
|
};
|
|
|
|
static const struct adsp_data sm8550_cdsp_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.dtb_firmware_name = "cdsp_dtb.mdt",
|
|
.pas_id = 18,
|
|
.dtb_pas_id = 0x25,
|
|
.minidump_id = 7,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mxc",
|
|
"nsp",
|
|
NULL
|
|
},
|
|
.load_state = "cdsp",
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
};
|
|
|
|
static const struct adsp_data sm8550_mpss_resource = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "modem.mdt",
|
|
.dtb_firmware_name = "modem_dtb.mdt",
|
|
.pas_id = 4,
|
|
.dtb_pas_id = 0x26,
|
|
.minidump_id = 3,
|
|
.auto_boot = false,
|
|
.decrypt_shutdown = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mss",
|
|
NULL
|
|
},
|
|
.load_state = "modem",
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "modem",
|
|
.ssctl_id = 0x12,
|
|
.region_assign_idx = 2,
|
|
.region_assign_count = 1,
|
|
.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
|
|
};
|
|
|
|
static const struct adsp_data sc7280_wpss_resource = {
|
|
.crash_reason_smem = 626,
|
|
.firmware_name = "wpss.mdt",
|
|
.pas_id = 6,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mx",
|
|
NULL
|
|
},
|
|
.load_state = "wpss",
|
|
.ssr_name = "wpss",
|
|
.sysmon_name = "wpss",
|
|
.ssctl_id = 0x19,
|
|
};
|
|
|
|
static const struct adsp_data sm8650_cdsp_resource = {
|
|
.crash_reason_smem = 601,
|
|
.firmware_name = "cdsp.mdt",
|
|
.dtb_firmware_name = "cdsp_dtb.mdt",
|
|
.pas_id = 18,
|
|
.dtb_pas_id = 0x25,
|
|
.minidump_id = 7,
|
|
.auto_boot = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mxc",
|
|
"nsp",
|
|
NULL
|
|
},
|
|
.load_state = "cdsp",
|
|
.ssr_name = "cdsp",
|
|
.sysmon_name = "cdsp",
|
|
.ssctl_id = 0x17,
|
|
.region_assign_idx = 2,
|
|
.region_assign_count = 1,
|
|
.region_assign_shared = true,
|
|
.region_assign_vmid = QCOM_SCM_VMID_CDSP,
|
|
};
|
|
|
|
static const struct adsp_data sm8650_mpss_resource = {
|
|
.crash_reason_smem = 421,
|
|
.firmware_name = "modem.mdt",
|
|
.dtb_firmware_name = "modem_dtb.mdt",
|
|
.pas_id = 4,
|
|
.dtb_pas_id = 0x26,
|
|
.minidump_id = 3,
|
|
.auto_boot = false,
|
|
.decrypt_shutdown = true,
|
|
.proxy_pd_names = (char*[]){
|
|
"cx",
|
|
"mss",
|
|
NULL
|
|
},
|
|
.load_state = "modem",
|
|
.ssr_name = "mpss",
|
|
.sysmon_name = "modem",
|
|
.ssctl_id = 0x12,
|
|
.region_assign_idx = 2,
|
|
.region_assign_count = 3,
|
|
.region_assign_vmid = QCOM_SCM_VMID_MSS_MSA,
|
|
};
|
|
|
|
static const struct of_device_id adsp_of_match[] = {
|
|
{ .compatible = "qcom,msm8226-adsp-pil", .data = &adsp_resource_init},
|
|
{ .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource},
|
|
{ .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init},
|
|
{ .compatible = "qcom,msm8996-adsp-pil", .data = &msm8996_adsp_resource},
|
|
{ .compatible = "qcom,msm8996-slpi-pil", .data = &msm8996_slpi_resource_init},
|
|
{ .compatible = "qcom,msm8998-adsp-pas", .data = &msm8996_adsp_resource},
|
|
{ .compatible = "qcom,msm8998-slpi-pas", .data = &msm8996_slpi_resource_init},
|
|
{ .compatible = "qcom,qcs404-adsp-pas", .data = &adsp_resource_init },
|
|
{ .compatible = "qcom,qcs404-cdsp-pas", .data = &cdsp_resource_init },
|
|
{ .compatible = "qcom,qcs404-wcss-pas", .data = &wcss_resource_init },
|
|
{ .compatible = "qcom,sc7180-adsp-pas", .data = &sm8250_adsp_resource},
|
|
{ .compatible = "qcom,sc7180-mpss-pas", .data = &mpss_resource_init},
|
|
{ .compatible = "qcom,sc7280-adsp-pas", .data = &sm8350_adsp_resource},
|
|
{ .compatible = "qcom,sc7280-cdsp-pas", .data = &sm6350_cdsp_resource},
|
|
{ .compatible = "qcom,sc7280-mpss-pas", .data = &mpss_resource_init},
|
|
{ .compatible = "qcom,sc7280-wpss-pas", .data = &sc7280_wpss_resource},
|
|
{ .compatible = "qcom,sc8180x-adsp-pas", .data = &sm8150_adsp_resource},
|
|
{ .compatible = "qcom,sc8180x-cdsp-pas", .data = &sm8150_cdsp_resource},
|
|
{ .compatible = "qcom,sc8180x-mpss-pas", .data = &sc8180x_mpss_resource},
|
|
{ .compatible = "qcom,sc8280xp-adsp-pas", .data = &sm8250_adsp_resource},
|
|
{ .compatible = "qcom,sc8280xp-nsp0-pas", .data = &sc8280xp_nsp0_resource},
|
|
{ .compatible = "qcom,sc8280xp-nsp1-pas", .data = &sc8280xp_nsp1_resource},
|
|
{ .compatible = "qcom,sdm660-adsp-pas", .data = &adsp_resource_init},
|
|
{ .compatible = "qcom,sdm845-adsp-pas", .data = &sdm845_adsp_resource_init},
|
|
{ .compatible = "qcom,sdm845-cdsp-pas", .data = &sdm845_cdsp_resource_init},
|
|
{ .compatible = "qcom,sdm845-slpi-pas", .data = &sdm845_slpi_resource_init},
|
|
{ .compatible = "qcom,sdx55-mpss-pas", .data = &sdx55_mpss_resource},
|
|
{ .compatible = "qcom,sm6115-adsp-pas", .data = &adsp_resource_init},
|
|
{ .compatible = "qcom,sm6115-cdsp-pas", .data = &cdsp_resource_init},
|
|
{ .compatible = "qcom,sm6115-mpss-pas", .data = &sc8180x_mpss_resource},
|
|
{ .compatible = "qcom,sm6350-adsp-pas", .data = &sm6350_adsp_resource},
|
|
{ .compatible = "qcom,sm6350-cdsp-pas", .data = &sm6350_cdsp_resource},
|
|
{ .compatible = "qcom,sm6350-mpss-pas", .data = &mpss_resource_init},
|
|
{ .compatible = "qcom,sm6375-adsp-pas", .data = &sm6350_adsp_resource},
|
|
{ .compatible = "qcom,sm6375-cdsp-pas", .data = &sm8150_cdsp_resource},
|
|
{ .compatible = "qcom,sm6375-mpss-pas", .data = &sm6375_mpss_resource},
|
|
{ .compatible = "qcom,sm8150-adsp-pas", .data = &sm8150_adsp_resource},
|
|
{ .compatible = "qcom,sm8150-cdsp-pas", .data = &sm8150_cdsp_resource},
|
|
{ .compatible = "qcom,sm8150-mpss-pas", .data = &mpss_resource_init},
|
|
{ .compatible = "qcom,sm8150-slpi-pas", .data = &sdm845_slpi_resource_init},
|
|
{ .compatible = "qcom,sm8250-adsp-pas", .data = &sm8250_adsp_resource},
|
|
{ .compatible = "qcom,sm8250-cdsp-pas", .data = &sm8250_cdsp_resource},
|
|
{ .compatible = "qcom,sm8250-slpi-pas", .data = &sdm845_slpi_resource_init},
|
|
{ .compatible = "qcom,sm8350-adsp-pas", .data = &sm8350_adsp_resource},
|
|
{ .compatible = "qcom,sm8350-cdsp-pas", .data = &sm8350_cdsp_resource},
|
|
{ .compatible = "qcom,sm8350-slpi-pas", .data = &sdm845_slpi_resource_init},
|
|
{ .compatible = "qcom,sm8350-mpss-pas", .data = &mpss_resource_init},
|
|
{ .compatible = "qcom,sm8450-adsp-pas", .data = &sm8350_adsp_resource},
|
|
{ .compatible = "qcom,sm8450-cdsp-pas", .data = &sm8350_cdsp_resource},
|
|
{ .compatible = "qcom,sm8450-slpi-pas", .data = &sdm845_slpi_resource_init},
|
|
{ .compatible = "qcom,sm8450-mpss-pas", .data = &sm8450_mpss_resource},
|
|
{ .compatible = "qcom,sm8550-adsp-pas", .data = &sm8550_adsp_resource},
|
|
{ .compatible = "qcom,sm8550-cdsp-pas", .data = &sm8550_cdsp_resource},
|
|
{ .compatible = "qcom,sm8550-mpss-pas", .data = &sm8550_mpss_resource},
|
|
{ .compatible = "qcom,sm8650-adsp-pas", .data = &sm8550_adsp_resource},
|
|
{ .compatible = "qcom,sm8650-cdsp-pas", .data = &sm8650_cdsp_resource},
|
|
{ .compatible = "qcom,sm8650-mpss-pas", .data = &sm8650_mpss_resource},
|
|
{ .compatible = "qcom,x1e80100-adsp-pas", .data = &x1e80100_adsp_resource},
|
|
{ .compatible = "qcom,x1e80100-cdsp-pas", .data = &x1e80100_cdsp_resource},
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, adsp_of_match);
|
|
|
|
static struct platform_driver adsp_driver = {
|
|
.probe = adsp_probe,
|
|
.remove_new = adsp_remove,
|
|
.driver = {
|
|
.name = "qcom_q6v5_pas",
|
|
.of_match_table = adsp_of_match,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(adsp_driver);
|
|
MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver");
|
|
MODULE_LICENSE("GPL v2");
|