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linux/arch/riscv/kernel
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Zong Li 38f5bd23de
riscv: Add cache information in AUX vector 
There are no standard CSR registers to provide cache information, the
way for RISC-V is to get this information from DT. Currently, AT_L1I_X,
AT_L1D_X and AT_L2_X are present in glibc header, and sysconf syscall
could use them to get information of cache through AUX vector.

The result of 'getconf -a' as follows:
LEVEL1_ICACHE_SIZE                 32768
LEVEL1_ICACHE_ASSOC                8
LEVEL1_ICACHE_LINESIZE             64
LEVEL1_DCACHE_SIZE                 32768
LEVEL1_DCACHE_ASSOC                8
LEVEL1_DCACHE_LINESIZE             64
LEVEL2_CACHE_SIZE                  2097152
LEVEL2_CACHE_ASSOC                 32
LEVEL2_CACHE_LINESIZE              64

Signed-off-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Palmer Dabbelt <palmerdabbelt@google.com>
Reviewed-by: Pekka Enberg <penberg@kernel.org>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-09-15 18:46:08 -07:00
..
vdso riscv: disable stack-protector for vDSO 2020-08-04 15:02:49 -07:00
.gitignore .gitignore: add SPDX License Identifier 2020-03-25 11:50:48 +01:00
asm-offsets.c riscv: Cleanup unnecessary define in asm-offset.c 2020-07-30 11:37:44 -07:00
cacheinfo.c riscv: Add cache information in AUX vector 2020-09-15 18:46:08 -07:00
cpu_ops_sbi.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu_ops_spinwait.c RISC-V: Add cpu_ops and modify default booting method 2020-03-31 11:25:56 -07:00
cpu_ops.c riscv: force __cpu_up_ variables to put in data section 2020-05-04 15:03:25 -07:00
cpu-hotplug.c RISC-V: Support cpu hotplug 2020-03-31 11:28:30 -07:00
cpu.c RISC-V: Rename and move plic_find_hart_id() to arch directory 2020-06-09 19:11:20 -07:00
cpufeature.c RISC-V: Add bitmap reprensenting ISA features common across CPUs 2020-05-04 14:08:59 -07:00
entry.S riscv: Cleanup unnecessary define in asm-offset.c 2020-07-30 11:37:44 -07:00
fpu.S riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
ftrace.c maccess: rename probe_kernel_{read,write} to copy_{from,to}_kernel_nofault 2020-06-17 10:57:41 -07:00
head.h riscv: add prototypes for assembly language functions from head.S 2019-10-28 00:46:00 -07:00
head.S riscv: Setup exception vector for nommu platform 2020-08-14 16:28:20 -07:00
irq.c RISC-V: Remove do_IRQ() function 2020-06-09 19:11:24 -07:00
jump_label.c riscv: Add jump-label implementation 2020-07-30 11:37:43 -07:00
kgdb.c riscv: Fix "no previous prototype" compile warning in kgdb.c file 2020-07-09 20:09:30 -07:00
Makefile RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
mcount-dyn.S riscv/ftrace: Add DYNAMIC_FTRACE_WITH_REGS support 2018-04-02 19:59:13 -07:00
mcount.S RISC-V: remove the unused return_to_handler export 2018-10-22 17:38:12 -07:00
module-sections.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
module.c riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocs 2020-07-30 11:37:41 -07:00
module.lds RISC-V: Add section of GOT.PLT for kernel module 2018-04-02 20:00:54 -07:00
patch.c maccess: rename probe_kernel_{read,write} to copy_{from,to}_kernel_nofault 2020-06-17 10:57:41 -07:00
perf_callchain.c riscv: abstract out CSR names for supervisor vs machine mode 2019-11-05 09:20:42 -08:00
perf_event.c riscv: perf_event: Make some funciton static 2020-05-11 13:48:19 -07:00
perf_regs.c riscv: Add support for perf registers sampling 2019-09-05 00:48:58 -07:00
process.c RISC-V Patches for the 5.9 Merge Window, Part 1 2020-08-07 10:11:12 -07:00
ptrace.c riscv: switch to ->regset_get() 2020-07-27 14:31:10 -04:00
reset.c riscv: cleanup the default power off implementation 2019-11-13 13:22:52 -08:00
riscv_ksyms.c riscv: Add KASAN support 2020-01-22 13:09:58 -08:00
sbi.c RISC-V: Add mechanism to provide custom IPI operations 2020-08-20 10:55:40 -07:00
setup.c RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
signal.c riscv: add nommu support 2019-11-17 15:17:39 -08:00
smp.c RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
smpboot.c RISC-V: Remove CLINT related code from timer and arch 2020-08-20 10:58:13 -07:00
soc.c mm: introduce include/linux/pgtable.h 2020-06-09 09:39:13 -07:00
stacktrace.c kernel: rename show_stack_loglvl() => show_stack() 2020-06-09 09:39:13 -07:00
sys_riscv.c RISC-V: Don't allow write+exec only page mapping request in mmap 2020-06-18 17:28:53 -07:00
syscall_table.c riscv: add missing header file includes 2019-10-28 00:46:01 -07:00
time.c riscv: use vDSO common flow to reduce the latency of the time-related functions 2020-06-10 19:47:16 -07:00
traps_misaligned.c riscv: Unaligned load/store handling for M_MODE 2020-04-03 10:45:33 -07:00
traps.c RISC-V: Setup exception vector early 2020-07-30 11:37:48 -07:00
vdso.c RISC-V Patches for the 5.8 Merge Window, Part 2 2020-06-11 12:55:20 -07:00
vmlinux.lds.S riscv: Fixup static_obj() fail 2020-07-30 11:37:21 -07:00