ab1fd5abb7
This new incompatible revision of the AIC peripheral introduces multi-die support. This binding is based on apple,aic, but changes interrupt-cells to add a new die argument. Also adds a second reg entry to specify the offset of the event register. Inexplicably, the capability registers allow us to compute other register offsets, but not this one. This allows us to keep forward-compatibility with future SoCs that will likely implement different die counts, thus shifting the event register. Apple also specify the offset explicitly in their device tree... Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Hector Martin <marcan@marcan.st> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220309192123.152028-3-marcan@marcan.st
99 lines
2.4 KiB
YAML
99 lines
2.4 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/apple,aic2.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Apple Interrupt Controller 2
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maintainers:
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- Hector Martin <marcan@marcan.st>
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description: |
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The Apple Interrupt Controller 2 is a simple interrupt controller present on
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Apple ARM SoC platforms starting with t600x (M1 Pro and Max).
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It provides the following features:
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- Level-triggered hardware IRQs wired to SoC blocks
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- Single mask bit per IRQ
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- Automatic masking on event delivery (auto-ack)
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- Software triggering (ORed with hw line)
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- Automatic prioritization (single event/ack register per CPU, lower IRQs =
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higher priority)
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- Automatic masking on ack
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- Support for multiple dies
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This device also represents the FIQ interrupt sources on platforms using AIC,
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which do not go through a discrete interrupt controller. It also handles
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FIQ-based Fast IPIs.
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properties:
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compatible:
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items:
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- const: apple,t6000-aic
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- const: apple,aic2
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interrupt-controller: true
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'#interrupt-cells':
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const: 4
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description: |
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The 1st cell contains the interrupt type:
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- 0: Hardware IRQ
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- 1: FIQ
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The 2nd cell contains the die ID.
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The next cell contains the interrupt number.
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- HW IRQs: interrupt number
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- FIQs:
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- 0: physical HV timer
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- 1: virtual HV timer
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- 2: physical guest timer
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- 3: virtual guest timer
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The last cell contains the interrupt flags. This is normally
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IRQ_TYPE_LEVEL_HIGH (4).
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reg:
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items:
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- description: Address and size of the main AIC2 registers.
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- description: Address and size of the AIC2 Event register.
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reg-names:
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items:
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- const: core
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- const: event
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power-domains:
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maxItems: 1
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required:
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- compatible
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- '#interrupt-cells'
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- interrupt-controller
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- reg
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- reg-names
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additionalProperties: false
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allOf:
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- $ref: /schemas/interrupt-controller.yaml#
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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aic: interrupt-controller@28e100000 {
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compatible = "apple,t6000-aic", "apple,aic2";
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#interrupt-cells = <4>;
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interrupt-controller;
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reg = <0x2 0x8e100000 0x0 0xc000>,
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<0x2 0x8e10c000 0x0 0x4>;
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reg-names = "core", "event";
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};
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};
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