8fea4b2e80
Loongson HTVEC support 8 parents interrupts in maximum, so update the maxItems description. Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Link: https://lore.kernel.org/r/1596099090-23516-2-git-send-email-chenhc@lemote.com
58 lines
1.3 KiB
YAML
58 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: "http://devicetree.org/schemas/interrupt-controller/loongson,htvec.yaml#"
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$schema: "http://devicetree.org/meta-schemas/core.yaml#"
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title: Loongson-3 HyperTransport Interrupt Vector Controller
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maintainers:
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- Jiaxun Yang <jiaxun.yang@flygoat.com>
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description:
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This interrupt controller is found in the Loongson-3 family of chips for
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receiving vectorized interrupts from PCH's interrupt controller.
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properties:
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compatible:
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const: loongson,htvec-1.0
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reg:
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maxItems: 1
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interrupts:
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minItems: 1
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maxItems: 8
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description: Eight parent interrupts that receive chained interrupts.
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interrupt-controller: true
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'#interrupt-cells':
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-controller
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- '#interrupt-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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htvec: interrupt-controller@fb000080 {
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compatible = "loongson,htvec-1.0";
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reg = <0xfb000080 0x40>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&liointc>;
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interrupts = <24 IRQ_TYPE_LEVEL_HIGH>,
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<25 IRQ_TYPE_LEVEL_HIGH>,
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<26 IRQ_TYPE_LEVEL_HIGH>,
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<27 IRQ_TYPE_LEVEL_HIGH>;
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};
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...
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