Krzysztof Kozlowski d058717bdf dt-bindings: pwm: imx-pwm: Add i.MX 8M compatibles
DTSes with new i.MX 8M SoCs introduce their own compatibles so add them
to fix dtbs_check warnings like:

  arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: pwm@30660000:
    compatible:0: 'fsl,imx8mm-pwm' is not one of ['fsl,imx1-pwm', 'fsl,imx27-pwm']
    From schema: Documentation/devicetree/bindings/pwm/imx-pwm.yaml

  arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: pwm@30660000:
    compatible: ['fsl,imx8mm-pwm', 'fsl,imx27-pwm'] is too long

  arch/arm64/boot/dts/freescale/imx8mm-evk.dt.yaml: pwm@30660000:
    compatible: Additional items are not allowed ('fsl,imx27-pwm' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
2020-09-14 16:48:13 -06:00

73 lines
1.4 KiB
YAML

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Freescale i.MX PWM controller
maintainers:
- Philipp Zabel <p.zabel@pengutronix.de>
properties:
"#pwm-cells":
description: |
Should be 2 for i.MX1 and 3 for i.MX27 and newer SoCs. See pwm.yaml
in this directory for a description of the cells format.
enum:
- 2
- 3
compatible:
oneOf:
- enum:
- fsl,imx1-pwm
- fsl,imx27-pwm
- items:
- enum:
- fsl,imx8mm-pwm
- fsl,imx8mn-pwm
- fsl,imx8mp-pwm
- fsl,imx8mq-pwm
- const: fsl,imx27-pwm
reg:
maxItems: 1
clocks:
items:
- description: SoC PWM ipg clock
- description: SoC PWM per clock
clock-names:
items:
- const: ipg
- const: per
interrupts:
maxItems: 1
required:
- "#pwm-cells"
- compatible
- reg
- clocks
- clock-names
- interrupts
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx5-clock.h>
pwm@53fb4000 {
#pwm-cells = <3>;
compatible = "fsl,imx27-pwm";
reg = <0x53fb4000 0x4000>;
clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>,
<&clks IMX5_CLK_PWM1_HF_GATE>;
clock-names = "ipg", "per";
interrupts = <61>;
};