c7c90b0b84
While working on supporting the Intel HDR backlight interface, I noticed
that there's a couple of laptops that will very rarely manage to boot up
without detecting Intel HDR backlight support - even though it's supported
on the system. One example of such a laptop is the Lenovo P17 1st
generation.
Following some investigation Ville Syrjälä did through the docs they have
available to them, they discovered that there's actually supposed to be a
30ms wait after writing the source OUI before we begin setting up the rest
of the backlight interface.
This seems to be correct, as adding this 30ms delay seems to have
completely fixed the probing issues I was previously seeing. So - let's
start performing a 30ms wait after writing the OUI, which we do in a manner
similar to how we keep track of PPS delays (e.g. record the timestamp of
the OUI write, and then wait for however many ms are left since that
timestamp right before we interact with the backlight) in order to avoid
waiting any longer then we need to. As well, this also avoids us performing
this delay on systems where we don't end up using the HDR backlight
interface.
V3:
* Move last_oui_write into intel_dp
V2:
* Move panel delays into intel_pps
Signed-off-by: Lyude Paul <lyude@redhat.com>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Fixes: 4a8d79901d5b ("drm/i915/dp: Enable Intel's HDR backlight interface (only SDR for now)")
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: <stable@vger.kernel.org> # v5.12+
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211130212912.212044-1-lyude@redhat.com
125 lines
5.0 KiB
C
125 lines
5.0 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Copyright © 2019 Intel Corporation
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*/
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#ifndef __INTEL_DP_H__
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#define __INTEL_DP_H__
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#include <linux/types.h>
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#include "i915_reg.h"
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enum intel_output_format;
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enum pipe;
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enum port;
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struct drm_connector_state;
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struct drm_encoder;
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struct drm_i915_private;
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struct drm_modeset_acquire_ctx;
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struct drm_dp_vsc_sdp;
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struct intel_atomic_state;
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struct intel_connector;
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struct intel_crtc_state;
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struct intel_digital_port;
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struct intel_dp;
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struct intel_encoder;
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struct link_config_limits {
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int min_rate, max_rate;
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int min_lane_count, max_lane_count;
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int min_bpp, max_bpp;
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};
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void intel_dp_adjust_compliance_config(struct intel_dp *intel_dp,
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struct intel_crtc_state *pipe_config,
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struct link_config_limits *limits);
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bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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int intel_dp_min_bpp(enum intel_output_format output_format);
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bool intel_dp_init_connector(struct intel_digital_port *dig_port,
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struct intel_connector *intel_connector);
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void intel_dp_set_link_params(struct intel_dp *intel_dp,
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int link_rate, int lane_count);
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int intel_dp_get_link_train_fallback_values(struct intel_dp *intel_dp,
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int link_rate, u8 lane_count);
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int intel_dp_retrain_link(struct intel_encoder *encoder,
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struct drm_modeset_acquire_ctx *ctx);
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void intel_dp_set_power(struct intel_dp *intel_dp, u8 mode);
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void intel_dp_configure_protocol_converter(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state);
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void intel_dp_sink_set_decompression_state(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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bool enable);
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void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
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void intel_dp_encoder_shutdown(struct intel_encoder *intel_encoder);
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void intel_dp_encoder_flush_work(struct drm_encoder *encoder);
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int intel_dp_compute_config(struct intel_encoder *encoder,
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struct intel_crtc_state *pipe_config,
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struct drm_connector_state *conn_state);
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bool intel_dp_is_edp(struct intel_dp *intel_dp);
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bool intel_dp_is_uhbr(const struct intel_crtc_state *crtc_state);
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bool intel_dp_is_port_edp(struct drm_i915_private *dev_priv, enum port port);
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enum irqreturn intel_dp_hpd_pulse(struct intel_digital_port *dig_port,
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bool long_hpd);
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void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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void intel_edp_backlight_off(const struct drm_connector_state *conn_state);
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void intel_dp_mst_suspend(struct drm_i915_private *dev_priv);
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void intel_dp_mst_resume(struct drm_i915_private *dev_priv);
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int intel_dp_max_link_rate(struct intel_dp *intel_dp);
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int intel_dp_max_lane_count(struct intel_dp *intel_dp);
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int intel_dp_rate_select(struct intel_dp *intel_dp, int rate);
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void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
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u8 *link_bw, u8 *rate_select);
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bool intel_dp_source_supports_tps3(struct drm_i915_private *i915);
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bool intel_dp_source_supports_tps4(struct drm_i915_private *i915);
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bool intel_dp_get_colorimetry_status(struct intel_dp *intel_dp);
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int intel_dp_link_required(int pixel_clock, int bpp);
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int intel_dp_max_data_rate(int max_link_rate, int max_lanes);
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bool intel_dp_can_bigjoiner(struct intel_dp *intel_dp);
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bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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void intel_dp_compute_psr_vsc_sdp(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state,
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struct drm_dp_vsc_sdp *vsc);
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void intel_write_dp_vsc_sdp(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state,
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const struct drm_dp_vsc_sdp *vsc);
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void intel_dp_set_infoframes(struct intel_encoder *encoder, bool enable,
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const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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void intel_read_dp_sdp(struct intel_encoder *encoder,
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struct intel_crtc_state *crtc_state,
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unsigned int type);
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bool intel_digital_port_connected(struct intel_encoder *encoder);
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static inline unsigned int intel_dp_unused_lane_mask(int lane_count)
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{
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return ~((1 << lane_count) - 1) & 0xf;
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}
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u32 intel_dp_mode_to_fec_clock(u32 mode_clock);
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void intel_ddi_update_pipe(struct intel_atomic_state *state,
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struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state,
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const struct drm_connector_state *conn_state);
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bool intel_dp_initial_fastset_check(struct intel_encoder *encoder,
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struct intel_crtc_state *crtc_state);
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void intel_dp_sync_state(struct intel_encoder *encoder,
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const struct intel_crtc_state *crtc_state);
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void intel_dp_check_frl_training(struct intel_dp *intel_dp);
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void intel_dp_pcon_dsc_configure(struct intel_dp *intel_dp,
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const struct intel_crtc_state *crtc_state);
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void intel_dp_phy_test(struct intel_encoder *encoder);
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void intel_dp_wait_source_oui(struct intel_dp *intel_dp);
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#endif /* __INTEL_DP_H__ */
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