Conor Dooley ab291621a8 riscv: dts: microchip: icicle: re-jig fabric peripheral addresses ...

When users try to add onto the reference design, they find that the
current addresses that peripherals connected to Fabric InterConnect
(FIC) 3 use are restrictive. For the v2022.09 reference design, the
peripherals have been shifted down, leaving more contiguous address
space for their custom IP/peripherals.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

2022-09-27 18:53:58 +01:00

..

canaan

RISC-V: Canaan devicetree fixes

2022-08-10 14:43:14 -07:00

microchip

riscv: dts: microchip: icicle: re-jig fabric peripheral addresses

2022-09-27 18:53:58 +01:00

sifive

riscv: dts: sifive unmatched: Add PWM controlled LEDs

2022-08-11 11:34:57 -07:00

starfive

riscv: dts: starfive: correct number of external interrupts

2022-08-11 11:40:37 -07:00

Makefile

RISC-V: Add BeagleV Starlight Beta device tree

2021-12-16 17:24:23 +01:00