Bharat Kumar Gogada
ab597d35ef
PCI: xilinx-nwl: Add support for Xilinx NWL PCIe Host Controller ...
Add PCIe Root Port driver for Xilinx PCIe NWL bridge IP.
[bhelgaas: wait for link like dw_pcie_wait_for_link(), simplify bitmap
error path, typos, whitespace, fold in Dan Carpenter's PTR_ERR() fix]
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Rob Herring <robh@kernel.org>
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ab597d35ef
