f1541773af
Currently there are 3 different variants of read_id implementation: 1. opcode only. Found in GD5FxGQ4xF. 2. opcode + 1 addr byte. Found in GD5GxGQ4xA/E 3. opcode + 1 dummy byte. Found in other currently supported chips. Original implementation was for variant 1 and let detect function of chips with variant 2 and 3 to ignore the first byte. This isn't robust: 1. For chips of variant 2, if SPI master doesn't keep MOSI low during read, chip will get a random id offset, and the entire id buffer will shift by that offset, causing detect failure. 2. For chips of variant 1, if it happens to get a devid that equals to manufacture id of variant 2 or 3 chips, it'll get incorrectly detected. This patch reworks detect procedure to address problems above. New logic do detection for all variants separatedly, in 1-2-3 order. Since all current detect methods do exactly the same id matching procedure, unify them into core.c and remove detect method from manufacture_ops. Tested on GD5F1GQ4UAYIG and W25N01GVZEIG. Signed-off-by: Chuanhong Guo <gch981213@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20200208074439.146296-1-gch981213@gmail.com
133 lines
3.5 KiB
C
133 lines
3.5 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (c) 2018 Macronix
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*
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* Author: Boris Brezillon <boris.brezillon@bootlin.com>
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*/
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#include <linux/device.h>
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#include <linux/kernel.h>
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#include <linux/mtd/spinand.h>
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#define SPINAND_MFR_MACRONIX 0xC2
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#define MACRONIX_ECCSR_MASK 0x0F
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static SPINAND_OP_VARIANTS(read_cache_variants,
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SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
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SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
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static SPINAND_OP_VARIANTS(write_cache_variants,
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SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
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SPINAND_PROG_LOAD(true, 0, NULL, 0));
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static SPINAND_OP_VARIANTS(update_cache_variants,
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SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
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SPINAND_PROG_LOAD(false, 0, NULL, 0));
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static int mx35lfxge4ab_ooblayout_ecc(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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return -ERANGE;
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}
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static int mx35lfxge4ab_ooblayout_free(struct mtd_info *mtd, int section,
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struct mtd_oob_region *region)
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{
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if (section)
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return -ERANGE;
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region->offset = 2;
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region->length = mtd->oobsize - 2;
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return 0;
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}
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static const struct mtd_ooblayout_ops mx35lfxge4ab_ooblayout = {
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.ecc = mx35lfxge4ab_ooblayout_ecc,
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.free = mx35lfxge4ab_ooblayout_free,
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};
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static int mx35lf1ge4ab_get_eccsr(struct spinand_device *spinand, u8 *eccsr)
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{
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struct spi_mem_op op = SPI_MEM_OP(SPI_MEM_OP_CMD(0x7c, 1),
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SPI_MEM_OP_NO_ADDR,
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SPI_MEM_OP_DUMMY(1, 1),
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SPI_MEM_OP_DATA_IN(1, eccsr, 1));
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int ret = spi_mem_exec_op(spinand->spimem, &op);
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if (ret)
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return ret;
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*eccsr &= MACRONIX_ECCSR_MASK;
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return 0;
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}
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static int mx35lf1ge4ab_ecc_get_status(struct spinand_device *spinand,
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u8 status)
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{
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struct nand_device *nand = spinand_to_nand(spinand);
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u8 eccsr;
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switch (status & STATUS_ECC_MASK) {
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case STATUS_ECC_NO_BITFLIPS:
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return 0;
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case STATUS_ECC_UNCOR_ERROR:
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return -EBADMSG;
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case STATUS_ECC_HAS_BITFLIPS:
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/*
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* Let's try to retrieve the real maximum number of bitflips
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* in order to avoid forcing the wear-leveling layer to move
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* data around if it's not necessary.
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*/
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if (mx35lf1ge4ab_get_eccsr(spinand, &eccsr))
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return nand->eccreq.strength;
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if (WARN_ON(eccsr > nand->eccreq.strength || !eccsr))
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return nand->eccreq.strength;
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return eccsr;
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default:
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break;
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}
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return -EINVAL;
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}
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static const struct spinand_info macronix_spinand_table[] = {
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SPINAND_INFO("MX35LF1GE4AB",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x12),
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NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
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NAND_ECCREQ(4, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout,
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mx35lf1ge4ab_ecc_get_status)),
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SPINAND_INFO("MX35LF2GE4AB",
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SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22),
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NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),
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NAND_ECCREQ(4, 512),
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SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
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&write_cache_variants,
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&update_cache_variants),
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SPINAND_HAS_QE_BIT,
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SPINAND_ECCINFO(&mx35lfxge4ab_ooblayout, NULL)),
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};
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static const struct spinand_manufacturer_ops macronix_spinand_manuf_ops = {
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};
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const struct spinand_manufacturer macronix_spinand_manufacturer = {
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.id = SPINAND_MFR_MACRONIX,
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.name = "Macronix",
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.chips = macronix_spinand_table,
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.nchips = ARRAY_SIZE(macronix_spinand_table),
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.ops = ¯onix_spinand_manuf_ops,
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};
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