2b27bdcc20
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not write to the free software foundation inc 51 franklin st fifth floor boston ma 02110 1301 usa extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 246 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190530000436.674189849@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
46 lines
1.3 KiB
C
46 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
/*
|
|
* This file is part of wl1251
|
|
*
|
|
* Copyright (c) 1998-2007 Texas Instruments Incorporated
|
|
* Copyright (C) 2008 Nokia Corporation
|
|
*/
|
|
|
|
#ifndef __WL1251_SPI_H__
|
|
#define __WL1251_SPI_H__
|
|
|
|
#include "cmd.h"
|
|
#include "acx.h"
|
|
#include "reg.h"
|
|
|
|
#define WSPI_CMD_READ 0x40000000
|
|
#define WSPI_CMD_WRITE 0x00000000
|
|
#define WSPI_CMD_FIXED 0x20000000
|
|
#define WSPI_CMD_BYTE_LENGTH 0x1FFE0000
|
|
#define WSPI_CMD_BYTE_LENGTH_OFFSET 17
|
|
#define WSPI_CMD_BYTE_ADDR 0x0001FFFF
|
|
|
|
#define WSPI_INIT_CMD_CRC_LEN 5
|
|
|
|
#define WSPI_INIT_CMD_START 0x00
|
|
#define WSPI_INIT_CMD_TX 0x40
|
|
/* the extra bypass bit is sampled by the TNET as '1' */
|
|
#define WSPI_INIT_CMD_BYPASS_BIT 0x80
|
|
#define WSPI_INIT_CMD_FIXEDBUSY_LEN 0x07
|
|
#define WSPI_INIT_CMD_EN_FIXEDBUSY 0x80
|
|
#define WSPI_INIT_CMD_DIS_FIXEDBUSY 0x00
|
|
#define WSPI_INIT_CMD_IOD 0x40
|
|
#define WSPI_INIT_CMD_IP 0x20
|
|
#define WSPI_INIT_CMD_CS 0x10
|
|
#define WSPI_INIT_CMD_WS 0x08
|
|
#define WSPI_INIT_CMD_WSPI 0x01
|
|
#define WSPI_INIT_CMD_END 0x01
|
|
|
|
#define WSPI_INIT_CMD_LEN 8
|
|
|
|
#define HW_ACCESS_WSPI_FIXED_BUSY_LEN \
|
|
((WL1251_BUSY_WORD_LEN - 4) / sizeof(u32))
|
|
#define HW_ACCESS_WSPI_INIT_CMD_MASK 0
|
|
|
|
#endif /* __WL1251_SPI_H__ */
|