045d05018a
At the moment, mEMACs are configured almost completely based on the phy-connection-type. That is, if the phy interface is RGMII, it assumed that RGMII is supported. For some interfaces, it is assumed that the RCW/bootloader has set up the SerDes properly. This is generally OK, but restricts runtime reconfiguration. The actual link state is never reported. To address these shortcomings, the driver will need additional information. First, it needs to know how to access the PCS/PMAs (in order to configure them and get the link status). The SGMII PCS/PMA is the only currently-described PCS/PMA. Add the XFI and QSGMII PCS/PMAs as well. The XFI (and 10GBASE-KR) PCS/PMA is a c45 "phy" which sits on the same MDIO bus as SGMII PCS/PMA. By default they will have conflicting addresses, but they are also not enabled at the same time by default. Therefore, we can let the XFI PCS/PMA be the default when phy-connection-type is xgmii. This will allow for backwards-compatibility. QSGMII, however, cannot work with the current binding. This is because the QSGMII PCS/PMAs are only present on one MAC's MDIO bus. At the moment this is worked around by having every MAC write to the PCS/PMA addresses (without checking if they are present). This only works if each MAC has the same configuration, and only if we don't need to know the status. Because the QSGMII PCS/PMA will typically be located on a different MDIO bus than the MAC's SGMII PCS/PMA, there is no fallback for the QSGMII PCS/PMA. Signed-off-by: Sean Anderson <sean.anderson@seco.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
173 lines
5.0 KiB
YAML
173 lines
5.0 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/fsl,fman-dtsec.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: NXP FMan MAC
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maintainers:
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- Madalin Bucur <madalin.bucur@nxp.com>
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description: |
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Each FMan has several MACs, each implementing an Ethernet interface. Earlier
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versions of FMan used the Datapath Three Speed Ethernet Controller (dTSEC) for
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10/100/1000 MBit/s speeds, and the 10-Gigabit Ethernet Media Access Controller
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(10GEC) for 10 Gbit/s speeds. Later versions of FMan use the Multirate
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Ethernet Media Access Controller (mEMAC) to handle all speeds.
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properties:
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compatible:
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enum:
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- fsl,fman-dtsec
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- fsl,fman-xgec
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- fsl,fman-memac
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cell-index:
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maximum: 64
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description: |
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FManV2:
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register[bit] MAC cell-index
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============================================================
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FM_EPI[16] XGEC 8
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FM_EPI[16+n] dTSECn n-1
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FM_NPI[11+n] dTSECn n-1
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n = 1,..,5
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FManV3:
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register[bit] MAC cell-index
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============================================================
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FM_EPI[16+n] mEMACn n-1
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FM_EPI[25] mEMAC10 9
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FM_NPI[11+n] mEMACn n-1
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FM_NPI[10] mEMAC10 9
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FM_NPI[11] mEMAC9 8
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n = 1,..8
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FM_EPI and FM_NPI are located in the FMan memory map.
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2. SoC registers:
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- P2041, P3041, P4080 P5020, P5040:
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register[bit] FMan MAC cell
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Unit index
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============================================================
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DCFG_DEVDISR2[7] 1 XGEC 8
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DCFG_DEVDISR2[7+n] 1 dTSECn n-1
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DCFG_DEVDISR2[15] 2 XGEC 8
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DCFG_DEVDISR2[15+n] 2 dTSECn n-1
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n = 1,..5
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- T1040, T2080, T4240, B4860:
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register[bit] FMan MAC cell
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Unit index
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============================================================
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DCFG_CCSR_DEVDISR2[n-1] 1 mEMACn n-1
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DCFG_CCSR_DEVDISR2[11+n] 2 mEMACn n-1
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n = 1,..6,9,10
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EVDISR, DCFG_DEVDISR2 and DCFG_CCSR_DEVDISR2 are located in
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the specific SoC "Device Configuration/Pin Control" Memory
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Map.
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reg:
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maxItems: 1
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fsl,fman-ports:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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maxItems: 2
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description: |
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An array of two references: the first is the FMan RX port and the second
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is the TX port used by this MAC.
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ptp-timer:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: A reference to the IEEE1588 timer
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phys:
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description: A reference to the SerDes lane(s)
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maxItems: 1
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phy-names:
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items:
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- const: serdes
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pcsphy-handle:
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$ref: /schemas/types.yaml#/definitions/phandle-array
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minItems: 1
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maxItems: 3
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deprecated: true
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description: See pcs-handle.
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pcs-handle:
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minItems: 1
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maxItems: 3
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description: |
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A reference to the various PCSs (typically found on the SerDes). If
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pcs-handle-names is absent, and phy-connection-type is "xgmii", then the first
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reference will be assumed to be for "xfi". Otherwise, if pcs-handle-names is
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absent, then the first reference will be assumed to be for "sgmii".
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pcs-handle-names:
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minItems: 1
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maxItems: 3
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items:
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enum:
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- sgmii
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- qsgmii
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- xfi
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description: The type of each PCS in pcsphy-handle.
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tbi-handle:
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$ref: /schemas/types.yaml#/definitions/phandle
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description: A reference to the (TBI-based) PCS
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required:
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- compatible
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- cell-index
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- reg
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- fsl,fman-ports
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- ptp-timer
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dependencies:
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pcs-handle-names:
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- pcs-handle
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allOf:
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- $ref: ethernet-controller.yaml#
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- if:
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properties:
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compatible:
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contains:
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const: fsl,fman-dtsec
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then:
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required:
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- tbi-handle
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unevaluatedProperties: false
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examples:
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- |
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ethernet@e0000 {
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compatible = "fsl,fman-dtsec";
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cell-index = <0>;
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reg = <0xe0000 0x1000>;
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fsl,fman-ports = <&fman1_rx8 &fman1_tx28>;
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ptp-timer = <&ptp_timer>;
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tbi-handle = <&tbi0>;
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};
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- |
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ethernet@e8000 {
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cell-index = <4>;
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compatible = "fsl,fman-memac";
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reg = <0xe8000 0x1000>;
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fsl,fman-ports = <&fman0_rx_0x0c &fman0_tx_0x2c>;
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ptp-timer = <&ptp_timer0>;
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pcs-handle = <&pcsphy4>, <&qsgmiib_pcs1>;
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pcs-handle-names = "sgmii", "qsgmii";
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phys = <&serdes1 1>;
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phy-names = "serdes";
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};
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...
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