049d567af2
This patch adds a new software defined pte bit. We use the reserved fields of ISA 3.0 pte definition since we will only be using this on DD1 code paths. We can possibly look at removing this code later. The software bit will be used to differentiate between 64K/4K and 2M ptes. This helps in finding the page size mapping by a pte so that we can do efficient tlb flush. We don't support 1G hugetlb pages yet. So we add a DEBUG WARN_ON to catch wrong usage. Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
54 lines
1.6 KiB
C
54 lines
1.6 KiB
C
#ifndef _ASM_POWERPC_BOOK3S_64_HUGETLB_H
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#define _ASM_POWERPC_BOOK3S_64_HUGETLB_H
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/*
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* For radix we want generic code to handle hugetlb. But then if we want
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* both hash and radix to be enabled together we need to workaround the
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* limitations.
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*/
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void radix__flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
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void radix__local_flush_hugetlb_page(struct vm_area_struct *vma, unsigned long vmaddr);
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extern unsigned long
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radix__hugetlb_get_unmapped_area(struct file *file, unsigned long addr,
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unsigned long len, unsigned long pgoff,
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unsigned long flags);
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static inline int hstate_get_psize(struct hstate *hstate)
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{
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unsigned long shift;
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shift = huge_page_shift(hstate);
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if (shift == mmu_psize_defs[MMU_PAGE_2M].shift)
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return MMU_PAGE_2M;
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else if (shift == mmu_psize_defs[MMU_PAGE_1G].shift)
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return MMU_PAGE_1G;
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else if (shift == mmu_psize_defs[MMU_PAGE_16M].shift)
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return MMU_PAGE_16M;
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else if (shift == mmu_psize_defs[MMU_PAGE_16G].shift)
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return MMU_PAGE_16G;
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else {
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WARN(1, "Wrong huge page shift\n");
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return mmu_virtual_psize;
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}
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}
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#define arch_make_huge_pte arch_make_huge_pte
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static inline pte_t arch_make_huge_pte(pte_t entry, struct vm_area_struct *vma,
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struct page *page, int writable)
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{
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unsigned long page_shift;
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if (!cpu_has_feature(CPU_FTR_POWER9_DD1))
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return entry;
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page_shift = huge_page_shift(hstate_vma(vma));
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/*
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* We don't support 1G hugetlb pages yet.
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*/
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VM_WARN_ON(page_shift == mmu_psize_defs[MMU_PAGE_1G].shift);
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if (page_shift == mmu_psize_defs[MMU_PAGE_2M].shift)
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return __pte(pte_val(entry) | _PAGE_LARGE);
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else
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return entry;
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}
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#endif
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