70b64604fe
AM654 SoC has Cadence Octal SPI controller, which is similar to Cadence QSPI controller but supports Octal IO(x8 data lines) and Double Data Rate(DDR) mode. Add new compatible to support OSPI controller on TI's AM654 SoCs. Signed-off-by: Vignesh R <vigneshr@ti.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Boris Brezillon <boris.brezillon@collabora.com>
63 lines
2.3 KiB
Plaintext
63 lines
2.3 KiB
Plaintext
* Cadence Quad SPI controller
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Required properties:
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- compatible : should be one of the following:
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Generic default - "cdns,qspi-nor".
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For TI 66AK2G SoC - "ti,k2g-qspi", "cdns,qspi-nor".
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For TI AM654 SoC - "ti,am654-ospi", "cdns,qspi-nor".
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- reg : Contains two entries, each of which is a tuple consisting of a
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physical address and length. The first entry is the address and
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length of the controller register set. The second entry is the
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address and length of the QSPI Controller data area.
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- interrupts : Unit interrupt specifier for the controller interrupt.
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- clocks : phandle to the Quad SPI clock.
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- cdns,fifo-depth : Size of the data FIFO in words.
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- cdns,fifo-width : Bus width of the data FIFO in bytes.
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- cdns,trigger-address : 32-bit indirect AHB trigger address.
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Optional properties:
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- cdns,is-decoded-cs : Flag to indicate whether decoder is used or not.
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- cdns,rclk-en : Flag to indicate that QSPI return clock is used to latch
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the read data rather than the QSPI clock. Make sure that QSPI return
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clock is populated on the board before using this property.
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Optional subnodes:
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Subnodes of the Cadence Quad SPI controller are spi slave nodes with additional
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custom properties:
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- cdns,read-delay : Delay for read capture logic, in clock cycles
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- cdns,tshsl-ns : Delay in nanoseconds for the length that the master
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mode chip select outputs are de-asserted between
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transactions.
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- cdns,tsd2d-ns : Delay in nanoseconds between one chip select being
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de-activated and the activation of another.
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- cdns,tchsh-ns : Delay in nanoseconds between last bit of current
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transaction and deasserting the device chip select
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(qspi_n_ss_out).
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- cdns,tslch-ns : Delay in nanoseconds between setting qspi_n_ss_out low
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and first bit transfer.
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Example:
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qspi: spi@ff705000 {
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compatible = "cdns,qspi-nor";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0xff705000 0x1000>,
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<0xffa00000 0x1000>;
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interrupts = <0 151 4>;
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clocks = <&qspi_clk>;
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cdns,is-decoded-cs;
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cdns,fifo-depth = <128>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x00000000>;
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flash0: n25q00@0 {
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...
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cdns,read-delay = <4>;
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cdns,tshsl-ns = <50>;
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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};
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};
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