a0aa7fa5c3
Add bindings documentation for the SM8650 Graphics Clock Controller. Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20231106-topic-sm8650-upstream-clocks-v3-4-761a6fadb4c0@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
44 lines
1.2 KiB
C
44 lines
1.2 KiB
C
/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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/*
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* Copyright (c) 2022, Qualcomm Innovation Center, Inc. All rights reserved
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* Copyright (c) 2023, Linaro Limited
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*/
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#ifndef _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8650_H
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#define _DT_BINDINGS_CLK_QCOM_GPU_CC_SM8650_H
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/* GPU_CC clocks */
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#define GPU_CC_AHB_CLK 0
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#define GPU_CC_CRC_AHB_CLK 1
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#define GPU_CC_CX_ACCU_SHIFT_CLK 2
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#define GPU_CC_CX_FF_CLK 3
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#define GPU_CC_CX_GMU_CLK 4
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#define GPU_CC_CXO_AON_CLK 5
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#define GPU_CC_CXO_CLK 6
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#define GPU_CC_DEMET_CLK 7
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#define GPU_CC_DPM_CLK 8
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#define GPU_CC_FF_CLK_SRC 9
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#define GPU_CC_FREQ_MEASURE_CLK 10
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#define GPU_CC_GMU_CLK_SRC 11
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#define GPU_CC_GX_ACCU_SHIFT_CLK 12
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#define GPU_CC_GX_FF_CLK 13
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#define GPU_CC_GX_GFX3D_CLK 14
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#define GPU_CC_GX_GFX3D_RDVM_CLK 15
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#define GPU_CC_GX_GMU_CLK 16
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#define GPU_CC_GX_VSENSE_CLK 17
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#define GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK 18
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#define GPU_CC_HUB_AON_CLK 19
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#define GPU_CC_HUB_CLK_SRC 20
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#define GPU_CC_HUB_CX_INT_CLK 21
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#define GPU_CC_HUB_DIV_CLK_SRC 22
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#define GPU_CC_MEMNOC_GFX_CLK 23
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#define GPU_CC_PLL0 24
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#define GPU_CC_PLL1 25
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#define GPU_CC_SLEEP_CLK 26
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/* GDSCs */
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#define GPU_GX_GDSC 0
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#define GPU_CX_GDSC 1
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#endif
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