4f83b5233f
Add a binding description for the MStar/SigmaStar MPLL clock block. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20210211052206.2955988-3-daniel@0x0f.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
47 lines
922 B
YAML
47 lines
922 B
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/mstar,msc313-mpll.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: MStar/Sigmastar MSC313 MPLL
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maintainers:
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- Daniel Palmer <daniel@thingy.jp>
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description: |
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The MStar/SigmaStar MSC313 and later ARMv7 chips have an MPLL block that
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takes the external xtal input and multiplies it to create a high
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frequency clock and divides that down into a number of clocks that
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peripherals use.
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properties:
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compatible:
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const: mstar,msc313-mpll
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"#clock-cells":
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const: 1
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clocks:
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maxItems: 1
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reg:
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maxItems: 1
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required:
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- compatible
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- "#clock-cells"
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- clocks
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- reg
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additionalProperties: false
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examples:
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- |
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mpll@206000 {
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compatible = "mstar,msc313-mpll";
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reg = <0x206000 0x200>;
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#clock-cells = <1>;
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clocks = <&xtal>;
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};
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