b1683d3744
Add initial support for the Clock Pulse Generator and Module Standby and Software Reset modules on the Renesas R-Car M3-W SoC: - Basic core clocks, - SCIF2 (console) module clock, - INTC-AP (GIC) module clock. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJXVUsJAAoJEEgEtLw/Ve779JMP/RBe2xa/etV3aCS2HKaknfnN oAbnnUkp1MuWjqXltfBidsMlqjBqtBWR/UAi0fBl1rhuT8oGgRiNqqJgUW8aZq0O f/HVl+aBM+cN+GLWkBXkvw/EbOVcyGgcCfoGyUJmZweVH0C991Nh+yX9va/H6Fh5 bjZ5+/Ie7K59ePRzARzgjHtF4kMKS5hrlCKyqX5MtRWaDcCRJ+r9YuYo1olu+d8d 37BIxLQ/i/js/so7sw6cAD8wttN+NW6d9KWL7ArG86rWLxDrhGE1nm1VH3p1mGzZ o3XZnybC5ULQv+iZLfCQDRPvvouhHKNaaO2uJkwvq293cC4Y3Nlll6W4637J4vgQ JvXugsPbpuIFlS0hToKVU3+fGdxlWIsqvjvPo5ZBmA42ByOcaVAKsyqVZ1gw8o0q 1u9pRX3HEGILf5G2N5qJ6DsjVQBPYwZZ6PkywwMUdF3uE6A+yIPDclc74Fo7HXUO 0yvh2keJcpn+Eyo1oPNR88cP6SY51PF2ZNscHGMO4ZTrFZ51fOe8FmynSvuZk9RY CislZFuRpnhdcrRPV9FjeJnJIzlEL4277c8OonzAndhqao/MJNHrZGewbEa8vEfG 0FLzsqG5yaWy1hkp2Vd9AVUZjzrKu2p0Kl2iwfJz8bMEANQ6D3hbWVHfgLfnSYE6 pAZMOQYAmci5md6VERuR =5UWd -----END PGP SIGNATURE----- Merge tag 'clk-renesas-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-next Pull support for Renesas R-car M3-W from Geert Uytterhoeven: Add initial support for the Clock Pulse Generator and Module Standby and Software Reset modules on the Renesas R-Car M3-W SoC: - Basic core clocks, - SCIF2 (console) module clock, - INTC-AP (GIC) module clock. * tag 'clk-renesas-for-v4.8-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers: clk: renesas: cpg-mssr: Add support for R-Car M3-W clk: renesas: cpg-mssr: Extract common R-Car Gen3 support code clk: renesas: Add r8a7796 CPG Core Clock Definitions clk: renesas: cpg-mssr: Document r8a7796 support |
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.. | ||
arm | ||
clk | ||
clock | ||
dma | ||
gpio | ||
i2c | ||
iio | ||
input | ||
interrupt-controller | ||
leds | ||
media | ||
memory | ||
mfd | ||
net | ||
phy | ||
pinctrl | ||
power | ||
pwm | ||
regulator | ||
reset | ||
soc | ||
sound | ||
spmi | ||
thermal |