This series converts the Tegra DTs and drivers to use the common/ standard DMA and reset bindings, rather than custom bindings. It also adds complete documentation for the Tegra clock bindings without actually changing any binding definitions. This conversion relies on a few sets of patches in branches from outside the Tegra tree: 1) A patch to add an DMA channel request API which allows deferred probe to be implemented. 2) A patch to implement a common part of the of_xlate function for DMA controllers. 3) Some ASoC patches (which in turn rely on (1) above), which support deferred probe during DMA channel allocation. 4) The Tegra clock driver changes for 3.14. Consequently, this branch is based on a merge of all of those external branches. In turn, this branch is or will be pulled into a few places that either rely on features introduced here, or would otherwise conflict with the patches: a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid conflicts. b) The DRM tree, which introduces new code that relies on the reset controller framework introduced in this branch, and to avoid conflicts. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJSr3AnAAoJEMzrak5tbycxfMwQAMeffTFreJqDiQ4Vj0XmuhSn RFlXiZQsWtQ6gGgNfKyDsXzDMaz1KDAabcUYRcZwrluxuSCPBcK1JirCj5R8uRY7 LDZFX92CO8zRgiij0mhgokV4zzuEQ56q1uhPxqI3o+wG3v44jlMSMgFHQJUevdET aKr2Pss8Hb00XDztnpxprs6FUoU/W99NRH0i/5znbBwuHqYFP37zlKe2MRwbqDwR AMgkrnGoawe85Stz4p/iR9pCLpAMa0dH94V4JrAP4+IQrl0DEKWbrolpQHii4gzh NCGazMELTqkaZaorC/n1SmczH1kTj4vcjbbmeB8dwS8Vqhr+uf7W1oLlJ46TUOsp ESO0uD2GfpHKQQwLxEfgjfmwsIUMbdWHef8f2HUuvl6Js+LCpaPkxd52Pt/qL4sU 0sKqTbldRZXzGhvwa0/MK32WhmH4v31s7IZAg5A2YxqDR6yWryl7legWyvrI96C0 OlmVe1C/2NGk0QCfK0G/xTa9V7YzMfj8k4ICSZOgUoF4BeGGj6d3svWvLbKbbrU1 0fVvR7aCm78pRXixI6kURpj9D0mEfqus9Hx7VoWcL0TS4QH2dSYlGI+jDCiliQmj +kWrZWHsASSvPmUZk4RBNaviCbnGU8/t5nNdJSdFIUM/PIswzZ4GaAu6gdVksIY8 hcx410PyAzTZL2lENamE =8T7+ -----END PGP SIGNATURE----- Merge tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/cleanup From Stephen Warren: ARM: tegra: implement common DMA and resets DT bindings This series converts the Tegra DTs and drivers to use the common/ standard DMA and reset bindings, rather than custom bindings. It also adds complete documentation for the Tegra clock bindings without actually changing any binding definitions. This conversion relies on a few sets of patches in branches from outside the Tegra tree: 1) A patch to add an DMA channel request API which allows deferred probe to be implemented. 2) A patch to implement a common part of the of_xlate function for DMA controllers. 3) Some ASoC patches (which in turn rely on (1) above), which support deferred probe during DMA channel allocation. 4) The Tegra clock driver changes for 3.14. Consequently, this branch is based on a merge of all of those external branches. In turn, this branch is or will be pulled into a few places that either rely on features introduced here, or would otherwise conflict with the patches: a) Tegra's own for-3.14/powergate and for-4.14/dt branches, to avoid conflicts. b) The DRM tree, which introduces new code that relies on the reset controller framework introduced in this branch, and to avoid conflicts. * tag 'tegra-for-3.14-dmas-resets-rework' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (30 commits) spi: tegra: checking for ERR_PTR instead of NULL ASoC: tegra: update module reset list for Tegra124 clk: tegra: remove bogus PCIE_XCLK clk: tegra: remove legacy reset APIs ARM: tegra: remove legacy DMA entries from DT ARM: tegra: remove legacy clock entries from DT USB: EHCI: tegra: use reset framework Input: tegra-kbc - use reset framework serial: tegra: convert to standard DMA DT bindings serial: tegra: use reset framework spi: tegra: convert to standard DMA DT bindings spi: tegra: use reset framework staging: nvec: use reset framework i2c: tegra: use reset framework ASoC: tegra: convert to standard DMA DT bindings ASoC: tegra: allocate AHUB FIFO during probe() not startup() ASoC: tegra: call pm_runtime APIs around register accesses ASoC: tegra: use reset framework dma: tegra: register as an OF DMA controller dma: tegra: use reset framework ... Signed-off-by: Olof Johansson <olof@lixom.net>
274 lines
7.1 KiB
C
274 lines
7.1 KiB
C
/*
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* Copyright (C) 2012 Avionic Design GmbH
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* Copyright (C) 2012-2013 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef HOST1X_DRM_H
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#define HOST1X_DRM_H 1
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#include <uapi/drm/tegra_drm.h>
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#include <linux/host1x.h>
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#include <drm/drmP.h>
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_fb_helper.h>
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#include <drm/drm_fixed.h>
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struct reset_control;
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struct tegra_fb {
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struct drm_framebuffer base;
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struct tegra_bo **planes;
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unsigned int num_planes;
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};
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struct tegra_fbdev {
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struct drm_fb_helper base;
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struct tegra_fb *fb;
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};
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struct tegra_drm {
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struct drm_device *drm;
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struct mutex clients_lock;
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struct list_head clients;
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struct tegra_fbdev *fbdev;
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};
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struct tegra_drm_client;
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struct tegra_drm_context {
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struct tegra_drm_client *client;
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struct host1x_channel *channel;
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struct list_head list;
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};
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struct tegra_drm_client_ops {
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int (*open_channel)(struct tegra_drm_client *client,
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struct tegra_drm_context *context);
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void (*close_channel)(struct tegra_drm_context *context);
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int (*is_addr_reg)(struct device *dev, u32 class, u32 offset);
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int (*submit)(struct tegra_drm_context *context,
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struct drm_tegra_submit *args, struct drm_device *drm,
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struct drm_file *file);
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};
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int tegra_drm_submit(struct tegra_drm_context *context,
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struct drm_tegra_submit *args, struct drm_device *drm,
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struct drm_file *file);
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struct tegra_drm_client {
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struct host1x_client base;
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struct list_head list;
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const struct tegra_drm_client_ops *ops;
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};
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static inline struct tegra_drm_client *
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host1x_to_drm_client(struct host1x_client *client)
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{
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return container_of(client, struct tegra_drm_client, base);
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}
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extern int tegra_drm_register_client(struct tegra_drm *tegra,
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struct tegra_drm_client *client);
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extern int tegra_drm_unregister_client(struct tegra_drm *tegra,
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struct tegra_drm_client *client);
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extern int tegra_drm_init(struct tegra_drm *tegra, struct drm_device *drm);
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extern int tegra_drm_exit(struct tegra_drm *tegra);
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struct tegra_output;
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struct tegra_dc {
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struct host1x_client client;
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struct device *dev;
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spinlock_t lock;
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struct drm_crtc base;
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int pipe;
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struct clk *clk;
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struct reset_control *rst;
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void __iomem *regs;
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int irq;
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struct tegra_output *rgb;
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struct list_head list;
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struct drm_info_list *debugfs_files;
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struct drm_minor *minor;
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struct dentry *debugfs;
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/* page-flip handling */
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struct drm_pending_vblank_event *event;
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};
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static inline struct tegra_dc *
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host1x_client_to_dc(struct host1x_client *client)
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{
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return container_of(client, struct tegra_dc, client);
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}
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static inline struct tegra_dc *to_tegra_dc(struct drm_crtc *crtc)
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{
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return crtc ? container_of(crtc, struct tegra_dc, base) : NULL;
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}
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static inline void tegra_dc_writel(struct tegra_dc *dc, unsigned long value,
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unsigned long reg)
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{
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writel(value, dc->regs + (reg << 2));
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}
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static inline unsigned long tegra_dc_readl(struct tegra_dc *dc,
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unsigned long reg)
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{
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return readl(dc->regs + (reg << 2));
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}
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struct tegra_dc_window {
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struct {
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unsigned int x;
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unsigned int y;
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unsigned int w;
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unsigned int h;
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} src;
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struct {
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unsigned int x;
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unsigned int y;
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unsigned int w;
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unsigned int h;
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} dst;
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unsigned int bits_per_pixel;
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unsigned int format;
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unsigned int stride[2];
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unsigned long base[3];
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bool bottom_up;
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bool tiled;
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};
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/* from dc.c */
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extern unsigned int tegra_dc_format(uint32_t format);
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extern int tegra_dc_setup_window(struct tegra_dc *dc, unsigned int index,
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const struct tegra_dc_window *window);
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extern void tegra_dc_enable_vblank(struct tegra_dc *dc);
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extern void tegra_dc_disable_vblank(struct tegra_dc *dc);
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extern void tegra_dc_cancel_page_flip(struct drm_crtc *crtc,
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struct drm_file *file);
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struct tegra_output_ops {
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int (*enable)(struct tegra_output *output);
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int (*disable)(struct tegra_output *output);
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int (*setup_clock)(struct tegra_output *output, struct clk *clk,
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unsigned long pclk);
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int (*check_mode)(struct tegra_output *output,
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struct drm_display_mode *mode,
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enum drm_mode_status *status);
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};
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enum tegra_output_type {
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TEGRA_OUTPUT_RGB,
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TEGRA_OUTPUT_HDMI,
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};
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struct tegra_output {
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struct device_node *of_node;
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struct device *dev;
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const struct tegra_output_ops *ops;
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enum tegra_output_type type;
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struct i2c_adapter *ddc;
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const struct edid *edid;
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unsigned int hpd_irq;
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int hpd_gpio;
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struct drm_encoder encoder;
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struct drm_connector connector;
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};
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static inline struct tegra_output *encoder_to_output(struct drm_encoder *e)
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{
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return container_of(e, struct tegra_output, encoder);
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}
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static inline struct tegra_output *connector_to_output(struct drm_connector *c)
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{
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return container_of(c, struct tegra_output, connector);
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}
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static inline int tegra_output_enable(struct tegra_output *output)
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{
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if (output && output->ops && output->ops->enable)
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return output->ops->enable(output);
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return output ? -ENOSYS : -EINVAL;
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}
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static inline int tegra_output_disable(struct tegra_output *output)
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{
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if (output && output->ops && output->ops->disable)
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return output->ops->disable(output);
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return output ? -ENOSYS : -EINVAL;
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}
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static inline int tegra_output_setup_clock(struct tegra_output *output,
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struct clk *clk, unsigned long pclk)
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{
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if (output && output->ops && output->ops->setup_clock)
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return output->ops->setup_clock(output, clk, pclk);
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return output ? -ENOSYS : -EINVAL;
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}
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static inline int tegra_output_check_mode(struct tegra_output *output,
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struct drm_display_mode *mode,
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enum drm_mode_status *status)
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{
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if (output && output->ops && output->ops->check_mode)
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return output->ops->check_mode(output, mode, status);
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return output ? -ENOSYS : -EINVAL;
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}
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/* from bus.c */
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int drm_host1x_init(struct drm_driver *driver, struct host1x_device *device);
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void drm_host1x_exit(struct drm_driver *driver, struct host1x_device *device);
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/* from rgb.c */
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extern int tegra_dc_rgb_probe(struct tegra_dc *dc);
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extern int tegra_dc_rgb_remove(struct tegra_dc *dc);
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extern int tegra_dc_rgb_init(struct drm_device *drm, struct tegra_dc *dc);
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extern int tegra_dc_rgb_exit(struct tegra_dc *dc);
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/* from output.c */
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extern int tegra_output_probe(struct tegra_output *output);
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extern int tegra_output_remove(struct tegra_output *output);
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extern int tegra_output_init(struct drm_device *drm, struct tegra_output *output);
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extern int tegra_output_exit(struct tegra_output *output);
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/* from fb.c */
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struct tegra_bo *tegra_fb_get_plane(struct drm_framebuffer *framebuffer,
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unsigned int index);
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bool tegra_fb_is_bottom_up(struct drm_framebuffer *framebuffer);
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bool tegra_fb_is_tiled(struct drm_framebuffer *framebuffer);
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extern int tegra_drm_fb_init(struct drm_device *drm);
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extern void tegra_drm_fb_exit(struct drm_device *drm);
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extern void tegra_fbdev_restore_mode(struct tegra_fbdev *fbdev);
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extern struct platform_driver tegra_dc_driver;
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extern struct platform_driver tegra_hdmi_driver;
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extern struct platform_driver tegra_gr2d_driver;
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extern struct platform_driver tegra_gr3d_driver;
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#endif /* HOST1X_DRM_H */
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