60e9feb781
shim base and alh base are platform-dependent. Adding these two parameters allows us to use different shim/alh base for each platform. Signed-off-by: Bard Liao <yung-chuan.liao@linux.intel.com> Reviewed-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Reviewed-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com> Acked-By: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210723115451.7245-7-yung-chuan.liao@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
414 lines
10 KiB
C
414 lines
10 KiB
C
// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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// Copyright(c) 2015-17 Intel Corporation.
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/*
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* SDW Intel Init Routines
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*
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* Initializes and creates SDW devices based on ACPI and Hardware values
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*/
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#include <linux/acpi.h>
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#include <linux/export.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/auxiliary_bus.h>
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#include <linux/pm_runtime.h>
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#include <linux/soundwire/sdw_intel.h>
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#include "cadence_master.h"
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#include "intel.h"
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static void intel_link_dev_release(struct device *dev)
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{
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struct auxiliary_device *auxdev = to_auxiliary_dev(dev);
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struct sdw_intel_link_dev *ldev = auxiliary_dev_to_sdw_intel_link_dev(auxdev);
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kfree(ldev);
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}
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/* alloc, init and add link devices */
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static struct sdw_intel_link_dev *intel_link_dev_register(struct sdw_intel_res *res,
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struct sdw_intel_ctx *ctx,
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struct fwnode_handle *fwnode,
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const char *name,
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int link_id)
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{
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struct sdw_intel_link_dev *ldev;
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struct sdw_intel_link_res *link;
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struct auxiliary_device *auxdev;
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int ret;
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ldev = kzalloc(sizeof(*ldev), GFP_KERNEL);
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if (!ldev)
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return ERR_PTR(-ENOMEM);
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auxdev = &ldev->auxdev;
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auxdev->name = name;
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auxdev->dev.parent = res->parent;
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auxdev->dev.fwnode = fwnode;
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auxdev->dev.release = intel_link_dev_release;
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/* we don't use an IDA since we already have a link ID */
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auxdev->id = link_id;
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/*
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* keep a handle on the allocated memory, to be used in all other functions.
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* Since the same pattern is used to skip links that are not enabled, there is
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* no need to check if ctx->ldev[i] is NULL later on.
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*/
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ctx->ldev[link_id] = ldev;
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/* Add link information used in the driver probe */
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link = &ldev->link_res;
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link->mmio_base = res->mmio_base;
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link->registers = res->mmio_base + SDW_LINK_BASE
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+ (SDW_LINK_SIZE * link_id);
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link->shim = res->mmio_base + res->shim_base;
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link->alh = res->mmio_base + res->alh_base;
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link->ops = res->ops;
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link->dev = res->dev;
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link->clock_stop_quirks = res->clock_stop_quirks;
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link->shim_lock = &ctx->shim_lock;
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link->shim_mask = &ctx->shim_mask;
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link->link_mask = ctx->link_mask;
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/* now follow the two-step init/add sequence */
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ret = auxiliary_device_init(auxdev);
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if (ret < 0) {
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dev_err(res->parent, "failed to initialize link dev %s link_id %d\n",
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name, link_id);
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kfree(ldev);
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return ERR_PTR(ret);
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}
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ret = auxiliary_device_add(&ldev->auxdev);
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if (ret < 0) {
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dev_err(res->parent, "failed to add link dev %s link_id %d\n",
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ldev->auxdev.name, link_id);
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/* ldev will be freed with the put_device() and .release sequence */
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auxiliary_device_uninit(&ldev->auxdev);
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return ERR_PTR(ret);
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}
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return ldev;
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}
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static void intel_link_dev_unregister(struct sdw_intel_link_dev *ldev)
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{
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auxiliary_device_delete(&ldev->auxdev);
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auxiliary_device_uninit(&ldev->auxdev);
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}
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static int sdw_intel_cleanup(struct sdw_intel_ctx *ctx)
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{
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struct sdw_intel_link_dev *ldev;
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u32 link_mask;
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int i;
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link_mask = ctx->link_mask;
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for (i = 0; i < ctx->count; i++) {
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if (!(link_mask & BIT(i)))
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continue;
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ldev = ctx->ldev[i];
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pm_runtime_disable(&ldev->auxdev.dev);
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if (!ldev->link_res.clock_stop_quirks)
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pm_runtime_put_noidle(ldev->link_res.dev);
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intel_link_dev_unregister(ldev);
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}
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return 0;
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}
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#define HDA_DSP_REG_ADSPIC2 (0x10)
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#define HDA_DSP_REG_ADSPIS2 (0x14)
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#define HDA_DSP_REG_ADSPIC2_SNDW BIT(5)
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/**
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* sdw_intel_enable_irq() - enable/disable Intel SoundWire IRQ
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* @mmio_base: The mmio base of the control register
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* @enable: true if enable
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*/
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void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable)
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{
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u32 val;
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val = readl(mmio_base + HDA_DSP_REG_ADSPIC2);
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if (enable)
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val |= HDA_DSP_REG_ADSPIC2_SNDW;
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else
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val &= ~HDA_DSP_REG_ADSPIC2_SNDW;
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writel(val, mmio_base + HDA_DSP_REG_ADSPIC2);
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}
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EXPORT_SYMBOL_NS(sdw_intel_enable_irq, SOUNDWIRE_INTEL_INIT);
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irqreturn_t sdw_intel_thread(int irq, void *dev_id)
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{
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struct sdw_intel_ctx *ctx = dev_id;
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struct sdw_intel_link_res *link;
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list_for_each_entry(link, &ctx->link_list, list)
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sdw_cdns_irq(irq, link->cdns);
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sdw_intel_enable_irq(ctx->mmio_base, true);
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return IRQ_HANDLED;
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}
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EXPORT_SYMBOL_NS(sdw_intel_thread, SOUNDWIRE_INTEL_INIT);
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static struct sdw_intel_ctx
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*sdw_intel_probe_controller(struct sdw_intel_res *res)
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{
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struct sdw_intel_link_res *link;
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struct sdw_intel_link_dev *ldev;
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struct sdw_intel_ctx *ctx;
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struct acpi_device *adev;
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struct sdw_slave *slave;
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struct list_head *node;
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struct sdw_bus *bus;
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u32 link_mask;
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int num_slaves = 0;
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int count;
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int i;
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if (!res)
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return NULL;
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if (acpi_bus_get_device(res->handle, &adev))
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return NULL;
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if (!res->count)
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return NULL;
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count = res->count;
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dev_dbg(&adev->dev, "Creating %d SDW Link devices\n", count);
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/*
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* we need to alloc/free memory manually and can't use devm:
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* this routine may be called from a workqueue, and not from
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* the parent .probe.
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* If devm_ was used, the memory might never be freed on errors.
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*/
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ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return NULL;
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ctx->count = count;
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/*
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* allocate the array of pointers. The link-specific data is allocated
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* as part of the first loop below and released with the auxiliary_device_uninit().
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* If some links are disabled, the link pointer will remain NULL. Given that the
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* number of links is small, this is simpler than using a list to keep track of links.
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*/
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ctx->ldev = kcalloc(ctx->count, sizeof(*ctx->ldev), GFP_KERNEL);
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if (!ctx->ldev) {
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kfree(ctx);
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return NULL;
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}
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ctx->mmio_base = res->mmio_base;
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ctx->shim_base = res->shim_base;
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ctx->alh_base = res->alh_base;
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ctx->link_mask = res->link_mask;
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ctx->handle = res->handle;
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mutex_init(&ctx->shim_lock);
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link_mask = ctx->link_mask;
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INIT_LIST_HEAD(&ctx->link_list);
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for (i = 0; i < count; i++) {
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if (!(link_mask & BIT(i)))
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continue;
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/*
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* init and add a device for each link
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*
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* The name of the device will be soundwire_intel.link.[i],
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* with the "soundwire_intel" module prefix automatically added
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* by the auxiliary bus core.
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*/
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ldev = intel_link_dev_register(res,
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ctx,
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acpi_fwnode_handle(adev),
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"link",
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i);
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if (IS_ERR(ldev))
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goto err;
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link = &ldev->link_res;
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link->cdns = dev_get_drvdata(&ldev->auxdev.dev);
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if (!link->cdns) {
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dev_err(&adev->dev, "failed to get link->cdns\n");
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/*
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* 1 will be subtracted from i in the err label, but we need to call
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* intel_link_dev_unregister for this ldev, so plus 1 now
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*/
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i++;
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goto err;
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}
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list_add_tail(&link->list, &ctx->link_list);
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bus = &link->cdns->bus;
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/* Calculate number of slaves */
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list_for_each(node, &bus->slaves)
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num_slaves++;
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}
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ctx->ids = kcalloc(num_slaves, sizeof(*ctx->ids), GFP_KERNEL);
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if (!ctx->ids)
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goto err;
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ctx->num_slaves = num_slaves;
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i = 0;
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list_for_each_entry(link, &ctx->link_list, list) {
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bus = &link->cdns->bus;
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list_for_each_entry(slave, &bus->slaves, node) {
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ctx->ids[i].id = slave->id;
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ctx->ids[i].link_id = bus->link_id;
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i++;
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}
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}
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return ctx;
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err:
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while (i--) {
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if (!(link_mask & BIT(i)))
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continue;
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ldev = ctx->ldev[i];
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intel_link_dev_unregister(ldev);
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}
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kfree(ctx->ldev);
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kfree(ctx);
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return NULL;
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}
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static int
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sdw_intel_startup_controller(struct sdw_intel_ctx *ctx)
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{
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struct acpi_device *adev;
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struct sdw_intel_link_dev *ldev;
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u32 caps;
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u32 link_mask;
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int i;
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if (acpi_bus_get_device(ctx->handle, &adev))
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return -EINVAL;
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/* Check SNDWLCAP.LCOUNT */
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caps = ioread32(ctx->mmio_base + ctx->shim_base + SDW_SHIM_LCAP);
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caps &= GENMASK(2, 0);
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/* Check HW supported vs property value */
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if (caps < ctx->count) {
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dev_err(&adev->dev,
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"BIOS master count is larger than hardware capabilities\n");
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return -EINVAL;
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}
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if (!ctx->ldev)
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return -EINVAL;
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link_mask = ctx->link_mask;
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/* Startup SDW Master devices */
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for (i = 0; i < ctx->count; i++) {
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if (!(link_mask & BIT(i)))
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continue;
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ldev = ctx->ldev[i];
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intel_link_startup(&ldev->auxdev);
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if (!ldev->link_res.clock_stop_quirks) {
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/*
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* we need to prevent the parent PCI device
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* from entering pm_runtime suspend, so that
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* power rails to the SoundWire IP are not
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* turned off.
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*/
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pm_runtime_get_noresume(ldev->link_res.dev);
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}
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}
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return 0;
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}
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/**
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* sdw_intel_probe() - SoundWire Intel probe routine
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* @res: resource data
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*
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* This registers an auxiliary device for each Master handled by the controller,
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* and SoundWire Master and Slave devices will be created by the auxiliary
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* device probe. All the information necessary is stored in the context, and
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* the res argument pointer can be freed after this step.
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* This function will be called after sdw_intel_acpi_scan() by SOF probe.
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*/
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struct sdw_intel_ctx
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*sdw_intel_probe(struct sdw_intel_res *res)
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{
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return sdw_intel_probe_controller(res);
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}
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EXPORT_SYMBOL_NS(sdw_intel_probe, SOUNDWIRE_INTEL_INIT);
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/**
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* sdw_intel_startup() - SoundWire Intel startup
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* @ctx: SoundWire context allocated in the probe
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*
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* Startup Intel SoundWire controller. This function will be called after
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* Intel Audio DSP is powered up.
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*/
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int sdw_intel_startup(struct sdw_intel_ctx *ctx)
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{
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return sdw_intel_startup_controller(ctx);
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}
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EXPORT_SYMBOL_NS(sdw_intel_startup, SOUNDWIRE_INTEL_INIT);
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/**
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* sdw_intel_exit() - SoundWire Intel exit
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* @ctx: SoundWire context allocated in the probe
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*
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* Delete the controller instances created and cleanup
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*/
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void sdw_intel_exit(struct sdw_intel_ctx *ctx)
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{
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sdw_intel_cleanup(ctx);
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kfree(ctx->ids);
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kfree(ctx->ldev);
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kfree(ctx);
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}
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EXPORT_SYMBOL_NS(sdw_intel_exit, SOUNDWIRE_INTEL_INIT);
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void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx)
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{
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struct sdw_intel_link_dev *ldev;
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u32 link_mask;
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int i;
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if (!ctx->ldev)
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return;
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link_mask = ctx->link_mask;
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/* Startup SDW Master devices */
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for (i = 0; i < ctx->count; i++) {
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if (!(link_mask & BIT(i)))
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continue;
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ldev = ctx->ldev[i];
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intel_link_process_wakeen_event(&ldev->auxdev);
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}
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}
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EXPORT_SYMBOL_NS(sdw_intel_process_wakeen_event, SOUNDWIRE_INTEL_INIT);
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_DESCRIPTION("Intel Soundwire Init Library");
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