af4681097b
Tegra Memory Controller(MC) driver for Tegra30 Added to support MC General interrupts, mainly for IOMMU(SMMU). Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
32 lines
719 B
Plaintext
32 lines
719 B
Plaintext
#
|
|
# Memory devices
|
|
#
|
|
|
|
menuconfig MEMORY
|
|
bool "Memory Controller drivers"
|
|
|
|
if MEMORY
|
|
|
|
config TI_EMIF
|
|
tristate "Texas Instruments EMIF driver"
|
|
depends on ARCH_OMAP2PLUS
|
|
select DDR
|
|
help
|
|
This driver is for the EMIF module available in Texas Instruments
|
|
SoCs. EMIF is an SDRAM controller that, based on its revision,
|
|
supports one or more of DDR2, DDR3, and LPDDR2 SDRAM protocols.
|
|
This driver takes care of only LPDDR2 memories presently. The
|
|
functions of the driver includes re-configuring AC timing
|
|
parameters and other settings during frequency, voltage and
|
|
temperature changes
|
|
|
|
config TEGRA20_MC
|
|
bool
|
|
depends on ARCH_TEGRA_2x_SOC
|
|
|
|
config TEGRA30_MC
|
|
bool
|
|
depends on ARCH_TEGRA_3x_SOC
|
|
|
|
endif
|